STM32F405VGT6 Datasheet, PDF (30/185 Pages) STMicroelectronics – ARM Cortex-M4 32b MCU+FPU, 210DMIPS, up to 1MB Flash/192+4KB RAM, USB OTG HS/FS, Ethernet, 17 TIMs, 3 ADCs, 15 comm. interfaces & camera

Description
STM32F405xx, STM32F407xx
Standby mode, the SRAM and register contents are lost except for registers in the
backup domain and the backup SRAM when selected.
The device exits the Standby mode when an external reset (NRST pin), an IWDG reset,
a rising edge on the WKUP pin, or an RTC alarm / wakeup / tamper /time stamp event
occurs.
The standby mode is not supported when the embedded voltage regulator is bypassed
and the V₁₂ domain is controlled by an external power.
2.2.20
Note:
V_BAT operation
The V_BAT pin allows to power the device V_BAT domain from an external battery, an external
supercapacitor, or from V_DD when no external battery and an external supercapacitor are
present.
V_BAT operation is activated when V_DD is not present.
The V_BAT pin supplies the RTC, the backup registers and the backup SRAM.
When the microcontroller is supplied from V_BAT, external interrupts and RTC alarm/events
do not exit it from V_BAT operation.
When PDR_ON pin is not connected to V_DD (internal reset OFF), the V_BAT functionality is no
more available and V_BAT pin should be connected to V_DD.
2.2.21
Timers and watchdogs
The STM32F405xx and STM32F407xx devices include two advanced-control timers, eight
general-purpose timers, two basic timers and two watchdog timers.
All timer counters can be frozen in debug mode.
Table 4 compares the features of the advanced-control, general-purpose and basic timers.
Table 4. Timer feature comparison
Timer
type
Timer
Counter
resolutio
n
Counter
type
Prescaler
factor
DMA
request
generatio
n
Capture/
compare
channels
Complementar
y output
Max
interface
clock
(MHz)
Max
timer
clock
(MHz)
Advanced TIM1,
-control TIM8
16-bit
Up,
Down,
Up/dow
n
Any integer
between 1
and 65536
Yes
4
Yes
84
168
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DocID022152 Rev 4