ST7FOXA0 Datasheet, PDF (62/123 Pages) STMicroelectronics – 8-bit MCU with single voltage Flash memory

On-chip peripherals
ST7FOXA0
9.1.6 Low power modes
Table 20. Effect on Lite timer
Mode
Wait
Active-halt
Halt
Description
No effect on Lite timer
No effect on Lite timer
Lite timer stops counting
9.1.7 Interrupts
Table 21. Interrupt events
te ^{Product(s) Note:}
Interrupt Event
Timebase event
IC Event
Event
Flag
TBF
ICF
Enable
Control
Bit
TBIE
ICIE
Exit
from
Wait
Yes
Yes
Exit
from
Halt
No
No
Exit
from
Active-Halt
Yes
No
The TBF and ICF interrupt events are connected to separate interrupt vectors (see
Interrupts chapter). They generate an interrupt if the enable bit is set in the LTCSR register
and the interrupt mask in the CC register is reset (RIM instruction).
bsole _{Figure 30. Input capture timing diagram}
O _125ns
- _{(@ 8MHz fOSC)}
t(s) ^fCPU
c _fOSC
rodu ^{13-bit COUNTER 0001h 0002h 0003h 0004h 0005h 0006h 0007h}
P _{LTIC PIN}
te _{ICF FLAG}
Obsole ^{LTICR REGISTER}
xxh
04h
CLEARED
BY S/W
READING
LTIC REGISTER
07h
t
9.1.8 Register description
Lite Timer Control/Status Register (LTCSR)
Reset Value: 0000 0x00 (0xh)
7
ICIE
ICF
TB
TBIE
TBF
Read/Write
WDGRF WDGE
0
WDGD
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