TDA7333 Datasheet, PDF (6/21 Pages) STMicroelectronics – RDS/RBDS PROCESSOR

TDA7333
The architecture is a very economical implementation because digital multipliers are not required. It is imple-
mented by cascading 4 integrators operating at full sampling rate (XTI/2) followed by 4 differentiators operating
at the reduced sampling rate (XTI/2/16). Also wrap around logic is allowed and the internal overflow will not af-
fect the output signal as long as a minimum required bit width is maintained.
The transfer function of this Sinc4/16 filter is:
H(z)
=



-¹---
M
1_{-1----–-–----}z_{-z--–-–--}^M_{-1---}
K
and its frequency response is:
with K = 4, M = 16
H(ej^ω)
=





-¹---
M
-^s---ⁱ-ⁿ----^----^M------²----^ω------^--
sin


ω_{-2--}


K
with
ω = 2π_f--^fs--
Figure 4. Transfer function of a 4th order Sinc Filter, decimation factor is 16.
0
10
20
30
40
50
60
70
80
90
100
0
Sinc4/16 Transfer Function
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
1.8
Frequency [Hz]
2
x 10 ⁶
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