TDA7333 Datasheet, PDF (16/21 Pages) STMicroelectronics – RDS/RBDS PROCESSOR

TDA7333
8.2 Read transfer
Figure 13. I²C read transfer
S Slave address R A rds_int A rds_qu
A testreg A P
from master to slave
from slave to master
S = start condition
R = read mode
Slave address = 001000S ( where S is the level of the pin
SA_DATAOUT)
A = acknowledge bit
P = stop condition
Eight bytes can be read at a time (please refer to the to the pages ??? to ??? for the meaning of each bit).
The master has always the possibility to read less than eight registers by not sending the acknowledge bit
and then generating a stop condition after having read the needed amount of registers.
There are two typical read access :
– read only the first register rds_int to check the interrupt bit.
– read the first five registers rds_int, rds_qu, rds_corrp, rds_bd_h, rds_bd_l to get the RDS data
The registers are read in the following order : rds_int, rds_qu, rds_corrp, rds_bd_h,rds_bd_l, rds_bd_ctrl,
sinc4reg, testreg.
Figure 14. I²C read access example 1: read of 5 bytes
SA
0
CSN 1
SDA
rds_int[7:0]
rds_qu[7:0]
rds_corrp[7:0]
rds_bd_h[7:0]
rds_bd_l[7:0]
SCL
S
SLAVE ADDRESS
R ACK
ACK
ACK
START
CONDITION
ACK
ACK
Figure 15. I²C read access example 2: read of 1 byte
SA
0
CSN 1
SDA
rds_int[7:0]
P
ACK
STOP
CONDITION
SCL
S
START
CONDITION
SLAVE ADDRESS
R ACK
P
ACK
STOP
CONDITION
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