TDA7333 Datasheet, PDF (10/21 Pages) STMicroelectronics – RDS/RBDS PROCESSOR

TDA7333
7.6 Group and block synchronization module
The group and block synchronization module has the following features :
– Hardware group and block synchronization
– Hardware error detection
– Hardware error correction using the quality bit information of the demodulator
– Hardware synchronization flywheel
– TAinformation extraction
– reset by software (ar_res)
Figure 9. Group and block synchronization block diagram
RDSCLK
RDSDAT
RDSQAL
from RDS
Demodulator
Group & Block Synchronization Control Block
rds_bd_h,rds_bd_l
read only
RDSDAT(15:0)
rds_corrp
read only
Block
missed
rds_qu
read only
Q(3:0)
Syndrome register
S(9:0)
S(4:0)
CP(9:5)
Correction ^{Correct. pat.}
logic
Corrected
Data_OK
Syndrom zero
QU(0:3)
next
RDS
bit
new
Block
available
bit_int _{rds_int}
set
read/write
res
int
set
Quality bit counter
RDS block counter
ABH
DBH
BLOCKE detected
BLOCK A
BLOCK B
BLOCK D
AR_RES
TAEON
TA
This module is used to acquire group and block synchronization of the received RDS data stream, which is pro-
vided in a modified shortened cyclic code. For the theory and implementation of the modified shortened cyclic
code, please refer to the specification of the radio data system (RDS) EN50067.
It further detects errors in the data stream. Depending on the quality bit information of the demodulator an error
correction is made.
The RDS data bytes are available to the software together with status bits giving an indication on the reliability
of the data.
It also extracts TA information which can be used as interrupt source (cf page 12).
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