STBCFG01 Datasheet, PDF (6/37 Pages) STMicroelectronics – Integrated current sensing resistor

Pin configuration
2
Pin configuration
Figure 2: Pin connections (top view)
STBCFG01
6/37
Symbol
PMID
DCIN
AGND
VCELL-
CENn
Ball
A1, B1
A2, A3
A4
A5
B2
SHDN
B3
RID
B4
VCELL+
LX
IRQn
DGND
B5
C1, D1
C2
C3
1V8
C4
VREF
C5
LDO
D2
SDA
D3
SCL
D4
R_SNS_N D5, E5
Table 2: Pin description
Pin function Description
Power I/O
Reverse blocking MOSFET to high-side connection node
Power I/O
Input supply voltage/OTG output
Analog ground Analog ground
Analog input Battery pack negative terminal sense input
Digital input
Charger enable, active low. Internal 200 kΩ pull-down to
GND
Digital input
Shutdown input, active high. Internal 200 kΩ pull-down to
GND
Analog input
Battery identification resistor connection (for battery
detection). An external bias has to be applied
Analog input Battery pack positive terminal sense input
Power I/O
Switch mode, inductor connection
Digital input
Open drain interrupt output, active low
Digital ground Digital ground
Analog out
1.8 V internal regulator bypass pin. Bypass this pin to GND
with a capacitor of 220 nF. Do not connect any load
Analog out
Reference voltage bypass pin. Do not connect any load
Analog out
4.85 V LDO output
Digital I/O
I²C data pin to the baseband, I²C master peripheral
Digital input
I²C clock pin to the baseband, I²C master peripheral
Power I/O
Internal sense resistor, negative terminal
DocID026474 Rev 3