STD7N90K5 Datasheet, PDF (5/16 Pages) STMicroelectronics – Ultra-low gate charge

STD7N90K5
Symbol
Parameter
td(on)
Turn-on delay
time
tr
td(off)
Rise time
Turn-off delay
time
tf
Fall time
Table 7: Switching times
Test conditions
Electrical characteristics
Min. Typ. Max. Unit
VDD= 450 V, ID = 3.5 A, RG = 4.7 Ω
- 13.2 -
ns
VGS = 10 V
- 14.2 -
ns
(see Figure 14: "Test circuit for resistive
load switching times" and Figure 19:
- 31.6 -
ns
"Switching time waveform")
- 14.7 -
ns
Symbol
Parameter
ISD
Source-drain
current
ISDM⁽¹⁾
Source-drain
current (pulsed)
VSD⁽²⁾
Forward on
voltage
trr
Reverse recovery
time
Qrr
Reverse recovery
charge
IRRM
Reverse recovery
current
trr
Reverse recovery
time
Qrr
Reverse recovery
charge
IRRM
Reverse recovery
current
Table 8: Source-drain diode
Test conditions
ISD = 7 A, VGS = 0 V
ISD = 7 A, di/dt = 100 A/µs,VDD = 60 V
(see Figure 16: "Test circuit for
inductive load switching and diode
recovery times")
ISD = 7 A, di/dt = 100 A/µs VDD = 60 V,
Tj = 150 °C
(see Figure 16: "Test circuit for
inductive load switching and diode
recovery times")
Notes:
(1)_{Pulse width limited by safe operating area}
(2)_{Pulsed: pulse duration = 300 µs, duty cycle 1.5%}
Min. Typ. Max. Unit
-
7
A
-
28 A
-
1.5 V
- 352
ns
- 3.63
µC
- 20.6
A
- 525
ns
- 4.94
µC
- 18.8
A
Symbol
V(BR)GSO
Parameter
Gate-source
breakdown
voltage
Table 9: Gate-source Zener diode
Test conditions
Min. Typ. Max. Unit
IGS= ± 1mA, ID= 0 A
±30 -
-
V
The built-in back-to-back Zener diodes are specifically designed to enhance the ESD
performance of the device. The Zener voltage facilitates efficient and cost-effective device
integrity protection, thus eliminating the need for additional external componentry.
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