STD26P3LLH6 Datasheet, PDF (4/16 Pages) STMicroelectronics – Low gate input resistance

Electrical characteristics
2
Electrical characteristics
STD26P3LLH6
(T_CASE = 25 °C unless otherwise specified)
Symbol
Parameter
Table 5. Static
Test conditions
Min. Typ. Max. Unit
Drain-source breakdown
V_{(BR)DSS Voltage}
Zero gate voltage drain
I_{DSS current (VGS = 0)}
I_GSS Gate body leakage current
V_GS(th) Gate threshold voltage
Static drain-source on-
R_{DS(on) resistance}
I_D = 250 μA, V_GS= 0
V_DS = 30 V
V_DS = 30 V, Tc = 125 °C
V_GS = ± 20 V, (V_DS = 0)
V_DS = V_GS, I_D = 250 μA
V_GS = 10 V, I_D = 6 A
V_GS = 4.5 V, I_D = 6 A
30
V
1 μA
10 μA
±100 nA
1
2.5 V
0.024 0.03 Ω
0.038 0.045 Ω
Note:
Symbol
Parameter
C_iss
C_oss
C_rss
Q_g
Q_gs
Q_gd
Input capacitance
Output capacitance
Reverse transfer
capacitance
Total gate charge
Gate-source charge
Gate-drain charge
R_g Gate input resistance
Table 6. Dynamic
Test conditions
V_DS = 25 V, f=1 MHz,
V_GS = 0
Min Typ. Max. Unit
- 1450 - pF
-
178
- pF
-
120
- pF
V_DD = 24 V, I_D = 12 A
V_GS = 4.5 V
(see Figure 14)
-
12
- nC
-
4.4
- nC
-
5
- nC
f = 1 MHz, gate DC
Bias = 0,
-
1.8
-
Ω
test signal level = 20 mV,
I_D = 0
For the P-channel Power MOSFETs the actual polarity of the voltages and the current must
be reversed.
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DocID023574 Rev 5