STB8N90K5 Datasheet, PDF (4/15 Pages) STMicroelectronics – Zener-protected

Electrical characteristics
STB8N90K5
2
Electrical characteristics
TC = 25 °C unless otherwise specified
Table 5: On/off-state
Symbol
Parameter
Test conditions
V(BR)DSS
IDSS
IGSS
VGS(th)
RDS(on)
Drain-source breakdown voltage
Zero gate voltage drain current
Gate body leakage current
Gate threshold voltage
Static drain-source on-resistance
VGS = 0 V, ID = 1 mA
VGS = 0 V, VDS = 900 V
VGS = 0 V, VDS = 900 V,
TC = 125 °C⁽¹⁾
VDS = 0 V, VGS = ±20 V
VDS = VGS, ID = 100 µA
VGS = 10 V, ID = 4 A
Min. Typ.
900
3
4
0.60
Max. Unit
V
1 µA
50 µA
±10 µA
5
V
0.68 Ω
Notes:
(1)_{Defined by design, not subject to production test.}
Symbol
Parameter
Table 6: Dynamic
Test conditions
Ciss
Coss
Crss
Co(tr)⁽¹⁾
Co(er)⁽²⁾
Input capacitance
Output capacitance
Reverse transfer capacitance
Equivalent capacitance time
related
Equivalent capacitance energy
related
VDS = 100 V, f = 1 MHz,
VGS = 0 V
VDS = 0 to 720 V,
VGS = 0 V
Rg Intrinsic gate resistance
Qg Total gate charge
Qgs Gate-source charge
Qgd Gate-drain charge
f = 1 MHz , ID= 0 A
VDD = 720 V, ID = 8 A,
VGS= 10 V
(see Figure 15: "Test
circuit for gate charge
behavior")
Min. Typ. Max. Unit
- 426 - pF
-
41
-
pF
- 1.2 - pF
-
75
-
pF
-
28
-
pF
-
7
-
Ω
-
11
-
nC
- 3.5 - nC
- 4.8 - nC
Notes:
(1)_{Time related is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS}
increases from 0 to 80% VDSS
(2)_{Energy related is defined as a constant equivalent capacitance giving the same stored energy as Coss when}
VDS increases from 0 to 80% VDSS
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