STB7ANM60N Datasheet, PDF (4/20 Pages) STMicroelectronics – Low input capacitance and gate charge

Electrical characteristics
2
Electrical characteristics
STB7ANM60N, STD7ANM60N
(T_C = 25 °C unless otherwise specified)
Symbol
Parameter
Table 5. On /off states
Test conditions
Drain-source
V_{(BR)DSS breakdown voltage}
I_D = 1 mA, V_GS = 0
I_DSS
I_GSS
V_GS(th)
R_DS(on)
Zero gate voltage
V_DS = 600 V
drain current (V_GS = 0) _{VDS = 600 V, TC=125 °C}
Gate-body leakage
current (V_DS = 0)
V_GS = ± 20 V
Gate threshold voltage V_DS = V_GS, I_D = 250 μA
Static drain-source on-
resistance
V_GS = 10 V, I_D = 2.5 A
Min. Typ. Max. Unit
600
V
1 μA
100 μA
±100 nA
2
3
4V
0.84 0.9 Ω
4/20
Symbol
Parameter
Table 6. Dynamic
Test conditions
Min. Typ. Max. Unit
C_iss
C_oss
C_rss
Input capacitance
Output capacitance
Reverse transfer
capacitance
V_DS = 50 V, f = 1 MHz,
V_GS = 0
- 363 - pF
- 24.6 - pF
-
1.1
- pF
(1) ^{Output equivalent}
C_{oss eq. capacitance}
V_DS = 0 to 480 V, V_GS = 0
- 130 - pF
Intrinsic gate
R_{G resistance}
f = 1 MHz open drain
-
5.4
-
Ω
Q_g Total gate charge
V_DD = 480 V, I_D = 5 A,
Q_gs Gate-source charge V_GS = 10 V
Q_gd Gate-drain charge
(see Figure 16)
-
14
- nC
2.7
- nC
7.7
- nC
1. C_{oss eq.} is defined as a constant equivalent capacitance giving the same charging time as C_oss when V_DS
increases from 0 to 80% V_DS.
Symbol
Parameter
t_d(on)
t_r
t_d(off)
t_f
Turn-on delay time
Rise time
Turn-off-delay time
Fall time
Table 7. Switching times
Test conditions
V_DD = 300 V, I_D = 2.5 A,
R_G = 4.7 Ω, V_GS = 10 V
(see Figure 17)
Min. Typ. Max. Unit
-
7
- ns
-
10
- ns
-
26
- ns
-
12
- ns
DocID023350 Rev 2