STB18N60M2 Datasheet, PDF (4/21 Pages) STMicroelectronics – Low gate input resistance

Electrical characteristics
STB18N60M2, STP18N60M2, STW18N60M2
2
Electrical characteristics
(T_C = 25 °C unless otherwise specified)
Symbol
Parameter
Table 5. On /off states
Test conditions
Drain-source
V_{(BR)DSS breakdown voltage}
I_D = 1 mA, V_GS = 0
I_DSS
I_GSS
V_GS(th)
R_DS(on)
Zero gate voltage
V_DS = 600 V
drain current (V_GS = 0) _{VDS = 600 V, TC=125 °C}
Gate-body leakage
current (V_DS = 0)
V_GS = ± 25 V
Gate threshold voltage V_DS = V_GS, I_D = 250 μA
Static drain-source
on-resistance
V_GS = 10 V, I_D = 6.5 A
Min. Typ. Max. Unit
600
V
1 μA
100 μA
±10 μA
2
3
4V
0.255 0.28 Ω
Symbol
Parameter
Table 6. Dynamic
Test conditions
Min. Typ. Max. Unit
C_iss
C_oss
C_rss
Input capacitance
Output capacitance
Reverse transfer
capacitance
V_DS = 100 V, f = 1 MHz,
V_GS = 0
- 791 - pF
-
40
- pF
-
5.6
- pF
(1) ^{Equivalent output}
C_{oss eq. capacitance}
V_DS = 0 to 480 V, V_GS = 0
- 164.5 - pF
Intrinsic gate
R_{G resistance}
f = 1 MHz, I_D = 0
-
5.6
-
Ω
Q_g Total gate charge
V_DD = 480 V, I_D = 13 A,
Q_gs Gate-source charge V_GS = 10 V
Q_gd Gate-drain charge
(see Figure 16)
- 21.5 - nC
-
3.2
- nC
- 11.3 - nC
1. C_{oss eq.} is defined as a constant equivalent capacitance giving the same charging time as C_oss when V_DS
increases from 0 to 80% V_DSS
Symbol
Parameter
t_d(on)
t_r
t_d(off)
t_f
Turn-on delay time
Rise time
Turn-off delay time
Fall time
Table 7. Switching times
Test conditions
Min. Typ. Max. Unit
-
12
- ns
V_DD = 300 V, I_D = 6.5 A,
-
9
- ns
R_G = 4.7 Ω, V_GS = 10 V
(see Figure 15 and Figure 20) ^-
47
- ns
- 10.6 - ns
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