STB12NM50N_08 Datasheet, PDF (4/19 Pages) STMicroelectronics – N-channel 500 V, 0.29 Ω, 11 A MDmesh™ II Power MOSFET TO-220 - DPAK - D2PAK - I2PAK - TO-220FP

Electrical characteristics
STB12NM50N - STD12NM50N - STI/F12NM50N - STP12NM50N
2
Electrical characteristics
(T_CASE=25 °C unless otherwise specified)
Table 5. On/off states
Symbol
Parameter
Test conditions
Min
V_(BR)DSS
Drain-source breakdown
voltage
I_D = 1 mA, V_GS= 0
500
dv/dt⁽¹⁾
Peak diode recovery voltage ^VDD^{=400 V, I}D^{=11 A,}
slope
V_GS=10 V
I_DSS
Zero gate voltage drain
current (V_GS = 0)
V_DS = max rating,
V_DS = max rating@125 °C
I_GSS
Gate body leakage current
(V_DS = 0)
V_GS = ±20 V
V_GS(th) Gate threshold voltage
V_DS= V_GS, I_D = 250 µA
2
R_DS(on)
Static drain-source on
resistance
V_GS= 10 V, I_D= 5.5 A
1. Characteristic value at turn off inductive load
Typ.
44
3
0.29
Max
1
100
100
4
0.38
Unit
V
V/ns
µA
µA
nA
V
Ω
Table 6. Dynamic
Symbol
Parameter
Test conditions
Min Typ. Max Unit
g_fs ⁽¹⁾ Forward transconductance ^V_DS ^{=15 V, I}_D ^{= 5.5 A}
8
S
C_iss
C_oss
C_rss
Input capacitance
Output capacitance
Reverse transfer
capacitance
V_DS =50 V, f=1 MHz,
V_GS=0
940
pF
100
pF
10
pF
C_oss
(2)
eq
Equivalent output
capacitance
V_GS=0, V_DS =0 to 400 V
130
pF
Q_{g Total gate charge}
Q_gs Gate-source charge
Q_gd Gate-drain charge
V_DD=400 V, I_D = 11 A
V_GS =10 V
(see Figure 17)
30
nC
6
nC
15
nC
f=1 MHz Gate DC Bias=0
R_g Gate input resistance
test signal level=20 mV
4.5
Ω
open drain
1. Pulsed: pulse duration=300 µs, duty cycle 1.5%
2. C_{oss eq.} is defined as a constant equivalent capacitance giving the same charging time as C_oss when V_DS
increases from 0 to 80% V_DSS
4/19