M14C64 Datasheet, PDF (4/14 Pages) STMicroelectronics – Memory Card IC 64/32 Kbit Serial I²C Bus EEPROM

M14C64, M14C32
Figure 5. I²C Bus Protocol
SCL
SDA
START
CONDITION
SDA
SDA
INPUT CHANGE
STOP
CONDITION
SCL
SDA
1
2
3
MSB
START
CONDITION
7
8
9
ACK
SCL
1
2
3
7
8
9
SDA
MSB
ACK
STOP
CONDITION
AI00792
Memory Addressing
To start communication between the bus master
and the slave memory, the master must initiate a
START condition. Following this, the master sends
8 bits to the SDA bus line (with the most significant
bit first). These bits represent the Device Select
Code (7 bits) and a RW bit.
The seven most significant bits of the Device Se-
lect Code are the Device Type Identifier, according
to the I²C bus definition. For the memory device,
Table 3. Most Significant Byte
b15 b14 b13 b12 b11 b10 b9 b8
Note: 1. b15 to b13 are Don’t Care on the M14C64 series.
b15 to b12 are Don’t Care on the M14C32 series.
Table 4. Least Significant Byte
b7 b6 b5 b4 b3 b2 b1 b0
Table 5. Device Select Code ¹
Device Code
Chip Enable
RW
b7
b6
b5
b4
b3
b2
b1
b0
Device Select
1
0
1
0
0
0
0
RW
Note: 1. The most significant bit, b7, is sent first.
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