ST92F124 Datasheet, PDF (347/426 Pages) STMicroelectronics – 8/16-BIT SINGLE VOLTAGE FLASH MCU FAMILY WITH RAM, E3 TMEMULATED EEPROM, CAN 2.0B AND J1850 BLPD

CONTROLLER AREA NETWORK (bxCAN)
CONTROLLER AREA NETWORK (Cont’d)
TRANSMIT ERROR COUNTER REG. (TECR)
Read Only
Reset Value: 00h
7
0
TEC7 TEC6 TEC5 TEC4 TEC3 TEC2 TEC1 TEC0
TEC[7:0] is the least significant byte of the 9-bit
Transmit Error Counter implementing part of the
fault confinement mechanism of the CAN protocol.
RECEIVE ERROR COUNTER REG. (RECR)
Page: 00h — Read Only
Reset Value: 00h
7
0
REC7 REC6 REC5 REC4 REC3 REC2 REC1 REC0
REC[7:0] is the Receive Error Counter implement-
ing part of the fault confinement mechanism of the
CAN protocol. In case of an error during reception,
this counter is incremented by 1 or by 8 depending
on the error condition as defined by the CAN stand-
ard. After every successful reception the counter is
decremented by 1 or reset to 120 if its value was
higher than 128. When the counter value exceeds
127, the CAN controller enters the error passive
state.
CAN DIAGNOSIS REGISTER (CDGR)
All bits of this register are set and clear by soft-
ware.
Read / Write
Reset Value: 0000 0000 (00h)
7
0
0
0
0
0
RX SAMP SILM LBKM
Bit 3 = RX CAN Rx Signal
- Read
Monitors the actual value of the CAN_RX Pin.
Bit 2 = SAMP Last Sample Point
- Read
The value of the last sample point.
Bit 1 = SILM Silent Mode
- Read/Set/Clear
0: Normal operation
1: Silent Mode
Bit 0 = LBKM Loop Back Mode
- Read/Set/Clear
0: Loop Back Mode disabled
1: Loop Back Mode enabled
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