RM0017 Datasheet, PDF (309/904 Pages) STMicroelectronics – The SPC560Bx and SPC560Cx is a new family

Memory Protection Unit (MPU)
RM0017
Field
VLD
Table 128. MPU_CESR field descriptions (continued)
Description
Valid
This bit provides a global enable/disable for the MPU.
0 The MPU is disabled.
1 The MPU is enabled.
While the MPU is disabled, all accesses from all bus masters are allowed.
MPU Error Address Register, Slave Port n (MPU_EARn)
When the MPU detects an access error on slave port n, the 32-bit reference address is
captured in this read-only register and the corresponding bit in the MPU_CESR[SPERR]
field set. Additional information about the faulting access is captured in the corresponding
MPU_EDRn register at the same time. Note this register and the corresponding
MPU_EDRn register contain the most recent access error; there are no hardware interlocks
with the MPU_CESR[SPERR] field as the error registers are always loaded upon the
occurrence of each protection violation.
Figure 133. MPU Error Address Register, Slave Port n (MPU_EARn)
Offsets: 0x010–0x020 (3 registers)
Access: Read
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
R
EADDR [31:16]
W
Reset – – – – – – – – – – – – – – – –
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
R
EADDR [15:0]
W
Reset – – – – – – – – – – – – – – – –
Field
EADDR
Table 129. MPU_EARn field descriptions
Description
Error Address
This field is the reference address from slave port n that generated the access error.
MPU Error Detail Register, Slave Port n (MPU_EDRn)
When the MPU detects an access error on slave port n, 32 bits of error detail are captured in
this read-only register and the corresponding bit in the MPU_CESR[SPERR] field set.
Information on the faulting address is captured in the corresponding MPU_EARn register at
the same time. Note that this register and the corresponding MPU_EARn register contain
the most recent access error; there are no hardware interlocks with the
MPU_CESR[SPERR] field as the error registers are always loaded upon the occurrence of
each protection violation.
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