LSM303DLHTR Datasheet, PDF (30/47 Pages) STMicroelectronics – Sensor module: 3-axis accelerometer and 3-axis magnetometer

Registers description
LSM303DLH
Table 20.
PM2
0
0
1
1
1
Power mode and low-power output data rate configurations (continued)
PM1
PM0
Power mode selection
Output data rate [Hz]
ODR_LP
1
0
Low-power
0.5
1
1
Low-power
1
0
0
Low-power
2
0
1
Low-power
5
1
0
Low-power
10
t(s) ^{- Obsolete Product(s) 9.1.2}
Table 21.
DR1
0
0
1
1
Normal-mode output data rate configurations and low-pass cut-off
frequencies
DR0
Output data rate [Hz]
ODR
Low-pass filter cut-off
frequency [Hz]
0
50
37
1
100
74
0
400
292
1
1000
780
CTRL_REG2_A (21h)
Table 22. CTRL_REG2_A register
BOOT
HPM1
HPM0
FDS
HPen2
HPen1
HPCF1 HPCF0
roduc _{Table 23. CTRL_REG2_A description}
te ^{P BOOT}
Reboot memory content. Default value: 0
(0: normal mode; 1: reboot memory content)
le _{High-pass filter mode selection. Default value: 00}
so ^{HPM1, HPM0 (00: normal mode; Others: refer to Table 24)}
b _{Filtered data selection. Default value: 0}
O ^FDS
(0: internal filter bypassed; 1: data from internal filter sent to output register)
HPen2
High-pass filter enabled for interrupt 2 source. Default value: 0
(0: filter bypassed; 1: filter enabled)
HPen1
High-pass filter enabled for interrupt 1 source. Default value: 0
(0: filter bypassed; 1: filter enabled)
HPCF1,
HPCF0
High-pass filter cut-off frequency configuration. Default value: 00
(00: HPc=8; 01: HPc=16; 10: HPc=32; 11: HPc=64)
The BOOT bit is used to refresh the content of internal registers stored in the Flash memory
block. At device power-up, the content of the Flash memory block is transferred to the
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