D950-CORE Datasheet, PDF (30/89 Pages) STMicroelectronics – 16-Bit Fixed Point Digital Signal Processor DSP Core

D950-Core
Low Power Mode
There are two ways to enter the low power mode:
• Execution of LP instruction.
The LP instruction is a 3-cycle conditional instruction. The Low Power mode is
entered after the last execute cycle of the LP instruction.
• Driving LP to low state.
LP is falling edge sensitive. Low Power mode can be entered only if the
processor is not in HOLD state or in Emulation mode.
The instruction decoded at the time that a LP request is recognized, is executed. Entering Low
Power mode is acknowledged by driving LPACK low.
When operating in Low Power mode, the D950-Core enters an idle state. In this state, the
following events occur:
• The clock generator is stopped (internal cycle clock) and INCYCLE remains
active. BSU_CLK, DMA_CLK are stopped.
• The internal state of the processor is frozen.
• X and Y data buses stay driven to Hi-Z.
• The bus address lines and control lines are driven to Hi-Z.
Exit of Low Power mode: Initiated by detecting a falling edge on IT. The processor clock
generator is restarted and LPACK is driven to a high state. If interrupts were disabled, program
execution restarts from the current PC and interrupt handshake signals ITACK and EOI are
not activated. If interrupts were enabled, a normal interrupt process starts.
STOP Mode
STOP mode is entered by use of the STOP instruction. The STOP instruction is processed as
the LP instruction, all clocks are stopped at the same time as the internal clock is stopped. The
LPACK signal is activated in the same way as for LP instruction.
Exit of the STOP mode is performed by detection of an interrupt request with the same
conditions as for exit of LP. LPACK signal is activated in the same way as for LP.
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