STE145N65M5 Datasheet, PDF (3/13 Pages) STMicroelectronics – Low gate charge and input capacitance

STE145N65M5
1
Electrical ratings
Symbol
Table 2: Absolute maximum ratings
Parameter
VGS
ID
ID
IDM⁽¹⁾
PTOT
IAR
EAS
dv/dt⁽²⁾
VISO
Tstg
Tj
Gate-source voltage
Drain current (continuous) at TC = 25 °C
Drain current (continuous) at TC = 100 °C
Drain current (pulsed)
Total dissipation at TC = 25 °C
Avalanche current, repetitive or not repetitive (pulse width
limited by Tj max)
Single pulse avalanche energy (starting Tj = 25 °C, ID = IAR,
VDD = 50 V)
Peak diode recovery voltage slope
Isolation withstand voltage applied between each pin and
heatsink plate (AC voltage, t = 60 s)
Storage temperature
Max. operating junction temperature
Notes:
(1)_{Pulse width limited by safe operating area.}
(2)_{ISD ≤ 143 A, di/dt ≤ 400 A/µs; VDS(peak) < V(BR)DSS, VDD = 400 V.}
Symbol
Rthj-case
Rthj-amb
Table 3: Thermal data
Parameter
Thermal resistance junction-case max
Thermal resistance junction-ambient max
Electrical ratings
Value
± 25
143
90
572
679
12
2420
15
2.5
- 55 to 150
150
Unit
V
A
A
A
W
A
mJ
V/ns
kV
°C
Value
0.184
30
Unit
°C/W
°C/W
DocID025538 Rev 2
3/13