TDA9110 Datasheet, PDF (22/29 Pages) STMicroelectronics – LOW-COST DEFLECTION PROCESSOR FOR MULTISYNC MONITORS

TDA9110
OPERATING DESCRIPTION (continued)
Figure 21 : Vertical Part Block Diagram
CHARGE CURRENT
TRANSCONDUCTANCE
AMPLIFIER
V_SYNC 2
SYNCHRO
POLARITY
PARABOLA
GENERATOR
REF
DISCH.
OSCILLATOR
22
OSC
CAP
20
SAMPLING
SAMP.
CAP
Vlow
Sawth.
Disch.
S CORRECTION
VS_AMP
SUB07/6bits
COR_C
SUB08/6bits
C CORRECTION
23 VERT_OUT
24 EW_OUT
EW_CENT EW_AMP
SUB0A/6bitsSUB09/7bits
18 BREATH
VERT_AMP
SUB05/7bits
V_MOIRE
SUB0C/5bits
V_POSITION
SUB06/7bits
SPB_OUT
PARAL
SPB_AMP
SUB0E/6bits SUB0D/6bits
Internal Signal to PLL2
AMP 6bits
III.2 - EW
EWOUT = 2.5V + K1 (V_OUT - V_DCOUT)²
+ K2 (VOUT - VDCOUT)
K1 is adjustable by the EW amplitude I²C register
K2 is adjustable by the Keystone I²C register
III.3 - DC HSize Output Control
A 7 bits D/A converter is available on Pin 28. The
output is a NPN transistor emitter follower output
with an internal 100mA current source from output
to ground (max. sunk current). The Max. current
the output is able to source is 2.5mA. The output
level is between 0.5V to 4.5V. This DAC can be
used to control the H-Size.
III.4 - Dynamic Horizontal Phase Control
IOUT = K5 (VOUT - VDCOUT)² + K6 (VOUT - VDCOUT)
K5 is adjustable by the SidePin Balance I²C register
V_FOCUS
Internal Signal added
to H_FOCUS
K6 is adjustable by the Parallelogram I²C register
III.5 - Function
When the synchronization pulse is not present, an
internal current source sets the free running fre-
quency. For an external capacitor, COSC = 150nF,
the typical free running frequency is 106Hz.
The typical free running frequency can be calcu-
lated by :
f₀
(Hz)
=
1.6
e^−5
⋅
1
C_OSC
A negative or positive TTL level pulse applied on
Pin 2 (VSYNC)as well as a TTLcomposite synchro
on Pin 1 can synchronize the ramp in the range
[fmin , fmax]. This frequency range depends on the
external capacitorconnectedon Pin 22.A capacitor
in the range [150nF, 220nF] ± 5% is recommanded
forapplicationin thefollowingrange: 50Hz to 120Hz.
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