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LPS001WP Datasheet, PDF (21/30 Pages) STMicroelectronics – MEMS pressure sensor 300-1100 mbar absolute digital output barometer
LPS001WP
Register description
output and 1Hz for temperature output. ODR1 and ODR2 bits can be configured as
described in Table 18.
Table 18. Output data rate bit configurations
ODR1(1)
ODR0
Pressure output data rate
Temperature output data rate
0
0
0
1
1
1
7 Hz
7 Hz
12.5 Hz
1 Hz
7 Hz
12.5 Hz
1. “10” bit configuration is not allowed and may cause incorrect device functionality.
DIFF_EN bit is used to enable the circuitry for the computing of delta pressure output,
) DELTA_P. In default mode (DIFF_EN = ‘0’) this circuitry is turned off.
t(s It is suggested to turn on the circuitry only after the configuration of the REF_P_L,
c REF_P_H, THS_P_L and THS_P_H registers used by the circuitry.
u BDU bit is used to inhibit output registers update between the reading of upper and lower
rod register parts. In default mode (BDU = ‘0’) the lower and upper register parts are updated
continuously. If it doesn’t read the output fast enough, the data update is blocked until the
P two registers have been read. In this way, after the reading of the lower (upper) register part,
te the content of that output register is not updated until the upper (lower) part is read too.
le This feature avoids reading LSB and MSB related to different samples.
o BLE bit is used to select big endian or little endian representation for output registers.
bs In the big endian one, MSB values are located in PRESS_OUT_L (pressure),
O TEMP_OUT_L (temperature) and DELTA_P_L (delta pressure), while LSB values are
- located in PRESS_OUT_H, TEMP_OUT_H and DELTA_P_H. In little endian representation
) the order is inverted (refer to data registers description for more details).
t(s SIM bit selects the SPI serial interface mode. When SIM is ‘0’ (default value) the 4-wire
c interface mode is selected and data coming from the device are sent to pin #4 (SDO).
u In 3-wire interface mode, output data are sent to pin #5 (SDI/SDO).
Prod 8.3
CTRL_REG2 (21h)
leteTable 19. CTRL_REG2 (21h) register
so BOOT
X
X
X
X
X
X
0(1)
Ob 1. Bit to be kept to ‘0’ for correct device functionality
Table 20.
BOOT
CTRL_REG2 (21h) register description
Reboot memory content. Default value: 0
(0: normal mode; 1: reboot memory content)
BOOT bit is used to refresh the content of internal registers stored in the flash memory
block. At device power-up, the content of the flash memory block is transferred to the
internal registers related to trimming functions to permit a good behavior of the device itself.
If for any reason the content of trimming registers was changed, it is sufficient to use this bit
Doc ID 18171 Rev 1
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