CRX14_10 Datasheet, PDF(19/47 Page) STMicroelectronics – ISO14443 type-B contactless coupler chip with anti-collision, CRC management and anti-clone function

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CRX14_10 Datasheet, PDF (19/47 Pages) STMicroelectronics – ISO14443 type-B contactless coupler chip with anti-collision, CRC management and anti-clone function

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CRX14

CRX14 IÂ²C protocol description

4.6

CRX14 IÂ²C write operations

The bus master sends a START condition, followed by a Device Select Code and the R/W

bit set to â0â. The CRX14 that corresponds to the Device Select Code, acknowledges and

waits for the bus master to send the Byte address of the register that is to be written to. After

receipt of the address, the CRX14 returns another ACK, and waits for the bus master to

send the data Bytes that are to be written.

In the CRX14 IÂ²C Write mode, the bus master may sends one or more data Bytes depending

on the selected register.

The CRX14 replies with an ACK after each data Byte received. The bus master terminates

the transfer by generating a STOP condition.

The STOP condition at the end of a Write access to the Input/Output Frame, Authenticate or

Anti-Collision Register causes the Radio Frequency data exchange between the CRX14

and the PICC to be started.

During the Radio Frequency data exchange, the CRX14 disconnects itself from the IÂ²C bus.

The time (tRFEX) needed to complete the exchange is not fixed as it depends on the PICC

command format. To know when the exchange is complete, the bus master uses an ACK

polling sequence as shown in Figure 8. It consists of the following:

â Initial condition: a Radio Frequency data exchange is in progress.

â Step 1: the master issues a START condition followed by the first Byte of the new

instruction (Device Select Code plus R/W bit).

â Step 2: if the CRX14 is busy, no ACK is returned and the master goes back to Step 1. If

the CRX14 has completed the Radio Frequency data exchange, it responds with an

ACK, indicating that it is ready to receive the second part of the next instruction (the

first Byte of this instruction being sent during Step 1).

Figure 7. CRX14 IÂ²C write mode sequence

BUS Master

CRX14 WRITE

BUS Slave

R/W

DEV SEL BYTE ADDR

DATA 1

DATA 2

DATA 3

ACK

DATA N

ACK

AI09265

Doc ID 8880 Rev 4

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