CRX14_10 Datasheet, PDF (17/47 Pages) STMicroelectronics – ISO14443 type-B contactless coupler chip with anti-collision, CRC management and anti-clone function

CRX14
CRX14 I²C protocol description
The CRX14 continuously monitors the SDA and SCL lines for a START condition (except
during Radio Frequency data exchanges), and will not respond unless one is sent.
4.2
I²C stop condition
STOP is identified by a Low-to-High transition of the Serial Data line, SDA, while the Serial
Clock, SCL, is stable in the High state.
A STOP condition terminates communications between the CRX14 and the bus master.
A STOP condition at the end of an I²C Read command, after (and only after) a NoACK,
forces the CRX14 into its stand-by state.
A STOP condition at the end of an I²C Write command triggers the Radio Frequency data
exchange between the CRX14 and the PICC.
4.3
I²C acknowledge bit (ACK)
An acknowledge bit is used to indicate a successful data transfer on the I²C bus.
The bus transmitter, either master or slave, releases the Serial Data line, SDA, after sending
8 bits of data. During the 9th clock pulse the receiver pulls the SDA line Low to acknowledge
the receipt of the 8 data bits.
4.4
I²C data input
During data input, the CRX14 samples the SDA bus signal on the rising edge of the Serial
Clock, SCL. For correct device operation, the SDA signal must be stable during the Low-to-
High Serial Clock transition, and the data must change only when the SCL line is Low.
Doc ID 8880 Rev 4
17/47