CRX14_10 Datasheet, PDF (14/47 Pages) STMicroelectronics – ISO14443 type-B contactless coupler chip with anti-collision, CRC management and anti-clone function

CRX14 registers
CRX14
Table 4. Input/output frame register description
Byte 0
Byte 1
Byte 2
Byte 3
... Byte 34
Byte 35
Frame Length First data Byte Second data Byte
Last data Byte
<------------- Request and Answer Frame Bytes exchanged on the RF ------------->
00h No Byte transmitted
FFh CRC Error
xxh Number of transmitted Bytes
3.3
Authenticate register (02h)
The Authenticate Register is used to trigger the complete authentication exchange between
the CRX14 and the secured ST short range memory. It is located at the I²C address 02h.
The Authentication system is based on a proprietary challenge/response mechanism that
allows the application software to authenticate a secured ST short range memory of the
SRXxxx family. A reader designed with the CRX14 can check the authenticity of a memory
device and protect the application system against silicon copies or emulators.
A complete description of the Authentication system is available under Non Disclosure
Agreement (NDA) with STMicroelectronics. For more details about this CRX14 function,
please contact the nearest STMicroelectronics sales office.
3.4
Slot marker register (03h)
The slot Marker Register is located at the I²C address 03h. It is used to trigger an automated
anti-collision sequence between the CRX14 and any ST short range memory present in the
electromagnetic field. With one I²C access, the CRX14 launches a complete stream of
commands starting from PCALL16(), SLOT_MARKER(1), SLOT_MARKER(2) up to
SLOT_MARKER(15), and stores all the identified Chip_IDs into the Input/Output Frame
Register (I²C address 01h).
This automated anti-collision sequence simplifies the host software development and
reduces the time needed to interrogate the 16 slots of the STMicroelectronics anti-collision
mechanism.
When accessed in I²C Write mode, the Slot Marker Register starts generating the sequence
of anti-collision commands. After each command, the CRX14 wait for the ST short range
memory answer frame which contains the Chip_ID. The validity of the answer is checked
and stored into the corresponding Status Slot Bit (Byte 1 and Byte 2 as described in
Table 5). If the answer is correct, the Status Slot Bit is set to ‘1’ and the Chip_ID is stored
into the corresponding Slot_Register. If no answer is detected, the Status Slot Bit is set to
‘0’, and the corresponding Slot_Register is set to 00h. If a CRC error is detected, the Status
Slot Bit is set to ‘0’, and the corresponding Slot_Register is set to FFh.
Each time the Slot Marker Register is accessed in I²C Write mode, Byte 0 of the
Input/Output Frame Register is set to 18, Bytes 1 and 2 provide Status Bits Slot information,
and Bytes 3 to 18 store the corresponding Chip_ID or error code.
The Slot Marker Register cannot be accessed in I²C Read mode. All the anti-collision data
can be accessed by reading the Input/Output Frame Register at the I²C address 01h.
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Doc ID 8880 Rev 4