STM32F745XX Datasheet, PDF (176/227 Pages) STMicroelectronics – ARM-based Cortex-M7 32b MCU+FPU, 462DMIPS, up to 1MB Flash/320+16+ 4KB RAM, USB OTG HS/FS, ethernet, 18 TIMs, 3 ADCs, 25 com itf, cam & LCD

Electrical characteristics
STM32F745xx STM32F746xx
1. Guaranteed by characterization results.
Table 95. Asynchronous multiplexed PSRAM/NOR write-NWAIT timings⁽¹⁾
Symbol
Parameter
Min
Max
Unit
t_w(NE)
FMC_NE low time
9T_HCLK
9T_HCLK+1.5
t_w(NWE)
t_{su(NWAIT_NE)}
t_{h(NE_NWAIT)}
FMC_NWE low time
FMC_NWAIT valid before FMC_NEx high
FMC_NEx hold time after FMC_NWAIT
invalid
1. Guaranteed by characterization results.
7T_HCLK–0.5 7T_HCLK+0.5 _ns
6T_HCLK+2
-
4T_HCLK–1
-
Synchronous waveforms and timings
Figure 62 through Figure 65 represent synchronous waveforms and Table 96 through
Table 99 provide the corresponding timings. The results shown in these tables are obtained
with the following FMC configuration:
• BurstAccessMode = FMC_BurstAccessMode_Enable;
• MemoryType = FMC_MemoryType_CRAM;
• WriteBurst = FMC_WriteBurst_Enable;
• CLKDivision = 1;
• DataLatency = 1 for NOR Flash; DataLatency = 0 for PSRAM
• CL = 30 pF on data and address lines. CL = 10 pF on FMC_CLK unless otherwise
specified.
In all timing tables, the T_HCLK is the HCLK clock period.
– For 2.7 V≤V_DD≤3.6 V, maximum FMC_CLK = 108 MHz at CL=20 pF or 90 MHz at
CL=30 pF (on FMC_CLK).
– For 1.71 V≤V_DD<2.7 V, maximum FMC_CLK = 70 MHz at CL=10 pF (on FMC_CLK).
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