STM32F302X6 Datasheet, PDF (137/138 Pages) STMicroelectronics – Reset and power management

STM32F302x6 STM32F302x8
Revision history
Date
10-Feb-2015
04-Jun-2015
22-Jul-2016
Table 84. Document revision history (continued)
Revision
Changes
Updated:
– the values for External clock (HSE bypass) at 48 MHz
in Table 28: Typical and maximum current
consumption from VDD supply at VDD = 3.6V
– Table 41: HSE oscillator characteristics
4
– Table 46: Flash memory characteristics
– Table 72: Comparator characteristics
Added:
– Figure 35: Maximum VREFINT scaler startup time
from power down
Updated:
5
– AF9 value for PA1, PA3 and PA9 in Table 13:
Alternate functions for Port A,
– the structure of Section 7: Package information.
Updated footnotes on:
– All document’s tables by removing the “not tested in
production” specification
– Table 12: STM32F302x6/8 pin definitions
– Table 19: Voltage characteristics
– Table 72: Comparator characteristics
– Figure 4: STM32F302x6/8 UFQFN32 pinout
– Figure 5: STM32F302x6/8 LQFP48 pinout
– Figure 6: STM32F302x6/8 LQFP64 pinout
– Figure 7: STM32F302x6/8 WLCSP49 ballout
– Figure 24: Recommended NRST pin protection
– Figure 46: UFQFPN32 - 32-pin, 5x5 mm, 0.5 mm
pitch ultra thin fine pitch quad flat package outline
Updated tables:
– Updated V_REFINT line on Table 26: Embedded internal
6
reference voltage
– Updated “Conditions” column on Table 42: LSE
oscillator characteristics (fLSE = 32.768 kHz)
– Added CMIR and t_STAB lines on Table 66: ADC
characteristics
– Updated R_LOAD line on Table 71: DAC characteristics
– Updated VOH_SAT and VOL_SAT lines on Table 73:
Operational amplifier characteristics
Updated figures:
– Figure 2: Clock tree
– Figure 7: STM32F302x6/8 WLCSP49 ballout
– Figure 21: Five volt tolerant (FT and FTf) I/O input
characteristics - CMOS port
– Figure 24: Recommended NRST pin protection
Added:
– Table 38: Wakeup time using USART
Updated name of Section 8: Ordering information
DocID025147 Rev 6
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