SST49LF004B_06 Datasheet, PDF (19/36 Pages) Silicon Storage Technology, Inc – 4 Mbit Firmware Hub

4 Mbit Firmware Hub
SST49LF004B
SOFTWARE COMMAND SEQUENCE
Preliminary Specifications
TABLE 10: SOFTWARE COMMAND SEQUENCE
Command
Sequence
Byte-Program
Sector-Erase
Block-Erase
Chip-Erase⁶
1st¹
Cycle
Addr² Data
YYYY 5555H AAH
YYYY 5555H AAH
YYYY 5555H AAH
YYYY 5555H AAH
2nd¹
Cycle
Addr² Data
YYYY 2AAAH 55H
YYYY 2AAAH 55H
YYYY 2AAAH 55H
YYYY 2AAAH 55H
3rd¹
Cycle
Addr² Data
YYYY 5555H A0H
YYYY 5555H 80H
YYYY 5555H 80H
YYYY 5555H 80H
4th¹
Cycle
Addr² Data
PA³
Data
YYYY 5555H AAH
YYYY 5555H AAH
YYYY 5555H AAH
5th¹
Cycle
Addr² Data
YYYY 2AAAH 55H
YYYY 2AAAH 55H
YYYY 2AAAH 55H
6th¹
Cycle
Addr² Data
SAX4
30H
BAX5
50H
YYYY 5555H 10H
Software
ID Entry^7,8
YYYY 5555H AAH YYYY 2AAAH 55H YYYY 5555H 90H
Read ID
Software
ID Exit⁹
XXXX XXXXH F0H
Software
ID Exit⁹
YYYY 5555H AAH YYYY 2AAAH 55H YYYY 5555H F0H
T10.0 1307
1. LPC mode use consecutive Write cycles to complete a command sequence; PP mode use consecutive bus cycles to complete a
command sequence.
2. YYYY = A[31:16]. In LPC mode, during SDP command sequence, YYYY must be within valid memory address range, see Address
out of range section for details. In PP mode, YYYY can be V_IL or V_IH, but no other value.
3. PA = Program Byte address
4. SA_X for Sector-Erase Address
5. BA_X for Block-Erase Address
6. Chip-Erase is supported in PP mode only
7. SST Manufacturer’s ID = BFH, is read with A₁₈-A₀ = 0.
With A₁₈-A₁ = 0; 49LF004B Device ID = 60H, is read with A₀ = 1.
8. The device does not remain in Software Product ID mode if powered down.
9. Both Software ID Exit operations are equivalent
©2006 Silicon Storage Technology, Inc.
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S71307-02-000
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