W219B Datasheet, PDF (9/14 Pages) Cypress Semiconductor – Frequency Generator for Integrated Core Logic with 133-MHz FSB

W219B
Byte 6: Reserved Register (1 = Enable, 0 = Disable)
Bit
Pin#
Name
Default
Pin Description
Bit 0
-
Reserved
0
Reserved
Table 4. Additional Frequency Selections through Serial Data Interface Data Bytes
Input Conditions
Output Frequency
Data Byte 4, Bit 3 = 1
Bit 2
Bit 7
Bit 6
Bit 5
Bit 4
SEL_4 SEL_3 SEL_2 SEL_1 SEL_0 CPU SDRAM 3V66
PCI
APIC
0
0
0
0
0
75.3
113.0
75.3
37.6
18.8
0
0
0
0
1
95.0
95.0
63.3
31.6
15.8
0
0
0
1
0
129.0
129.0
86.0
43.0
21.5
0
0
0
1
1
150.0
113.0
75.3
37.6
18.8
0
0
1
0
0
150.0
150.0
75.0
37.5
18.7
0
0
1
0
1
110.0
110.0
73.0
36.6
18.3
0
0
1
1
0
140.0
140.0
70.0
35.0
17.5
0
0
1
1
1
144.0
108.0
72.0
36.0
18.0
0
1
0
0
0
68.3
102.5
68.3
34.1
17.0
0
1
0
0
1
105.0
105.0
70.0
35.0
17.5
0
1
0
1
0
138.0
138.0
69.0
34.5
17.0
0
1
0
1
1
140.0
105.0
70.0
35.0
17.5
0
1
1
0
0
66.8
100.2
66.8
33.4
16.7
0
1
1
0
1
100.2
100.2
66.8
33.4
16.7
0
1
1
1
0
133.6
133.6
66.8
33.4
16.7
0
1
1
1
1
133.6
100.2
66.8
33.4
16.7
1
0
0
0
0
157.3
118.0
78.6
39.3
19.6
1
0
0
0
1
160.0
120.0
80.0
40.0
20.0
1
0
0
1
0
146.6
110.0
73.3
36.6
18.3
1
0
0
1
1
122.0
91.5
61.0
30.5
15.2
1
0
1
0
0
127.0
127.0
84.6
42.3
21.1
1
0
1
0
1
122.0
122.0
81.3
40.6
20.3
1
0
1
1
0
117.0
117.0
78.0
39.0
19.5
1
0
1
1
1
114.0
114.0
76.0
38.0
19.0
1
1
0
0
0
80.0
120.0
80.0
40.0
20.0
1
1
0
0
1
78.0
117.0
78.0
39.0
19.5
1
1
0
1
0
166.0
124.5
83.0
41.5
20.7
1
1
0
1
1
133.6
133.6
89.0
44.5
22.2
1
1
1
0
0
66.6
100.0
66.6
33.3
16.6
1
1
1
0
1
100.0
100.0
66.6
33.3
16.6
1
1
1
1
0
133.3
133.3
66.6
33.3
16.6
1
1
1
1
1
133.3
100.0
66.6
33.3
16.6
Spread
Spectrum
OFF
–0.6%
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
±0.45%
±0.45%
±0.45%
±0.45%
OFF
OFF
OFF
–0.6%
OFF
–0.6%
OFF
OFF
OFF
OFF
OFF
OFF
–0.6%
–0.6%
–0.6%
–0.6%
Rev 1.0, November 20, 2006
Page 9 of 14