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W196 Datasheet, PDF (3/11 Pages) Cypress Semiconductor – Spread Spectrum FTG for 440BX and VIA Apollo Pro-133
W196
Pin Definitions
Pin Name
CPU0:1
Pin
No.
22, 21
PCI1:6
PCI_F
5, 6, 7, 8, 10,
11, 4
IOAPIC
24
48MHz
13
24_48MHz/FS1
14
REF2X/SEL48#
27
FS0
SDATA
SCLOCK
X1
X2
VDDQ3
VDDQ2
GND
16
18
17
1
2
9, 12, 20, 26
23, 25
3, 15, 19, 28
Pin
Type
O
O
O
O
I/O
I/O
I
I/O
I
I
I
P
P
G
Pin Description
CPU Clock Outputs 0 through 1: These two CPU clocks run at a frequency set by
FS0:1 or the serial data interface. See Table 1 and Table 5. Output voltage swing is
set by the voltage applied to VDDQ2.
PCI Bus Clock Outputs 1 through 6 and PCI_F: These seven PCI clock outputs
run synchronously to the CPU clock. Voltage swing is set by the power connection
to VDDQ3.
I/O APIC Clock Output: Provides 14.318-MHz fixed frequency. The output voltage
swing is set by the power connection to VDDQ2.
48-MHz Output: Fixed 48-MHz USB clock. Output voltage swing is controlled by
voltage applied to VDDQ3.
24-MHz or 48-MHz Output/Frequency Select 1 Input: Frequency is set by the state
of pin 27 on power-up. This pin doubles as the select strap to determine device
operating frequency as described in Table 1.
I/O Dual-Function REF2X and SEL48# Pin: Upon power-up, the state of SEL48#
is latched. The initial state is set by either a 10K resistor to GND or to VDD. A 10K
resistor to GND causes pin 14 to output 48 MHz. If the pin is strapped to VDD, pin
14 will output 2 4MHz. After 2 ms, the pin becomes a high-drive output that produces
a copy of 14.318 MHz.
Frequency Selection 0 Input: Selects CPU clock frequency as shown in Table 1
on page 1.
I2C Data Pin: Data should be presented to this input as described in the I2C section
of this data sheet. Internal 250-k: pull-up resistor.
I2C Clock Pin: The I2C Data clock should be presented to this input as described
in the I2C section of this data sheet.
Crystal Connection or External Reference Frequency Input: Connect to either
a 14.318-MHz crystal or other reference signal.
Crystal Connection: An input connection for an external 14.318-MHz crystal. If
using an external reference, this pin must be left unconnected.
Power Connection: Power supply for core logic and PLL circuitry, PCI, 48/24MHz,
and Reference output buffers. Connect to 3.3V supply.
Power Connection: Power supply for IOAPIC and CPU output buffers. Connect to
2.5V supply.
Ground Connections: Connect all ground pins to the common system ground
plane.
Rev 1.0, November 28, 2006
Page 3 of 11