LAN83C180 Datasheet, PDF (8/10 Pages) SMSC Corporation – 10/100 FAST ETHERNET PHY TRANSCEIVER

Migrating from the LAN83C180 10/100 PHY to the LAN83C185 10/100 PHY
5 Clock Circuit
The LAN83C185 can accept either a 25MHz crystal or 25 MHz clock oscillator input. The LAN83C185
shares the 25MHz clock oscillator input (CLKIN) with the crystal input (XTAL1) on pin 23. This differs from
the LAN83C180, which uses a dedicated clock oscillator pin (REFCLK).
It is recommended that a crystal utilizing matching parallel load capacitors be used for the LAN83C185
crystal input/output signals (XTAL1, XTAL2). Please refer to the crystal device datasheet for recommended
capacitor values.
Additionally, SMSC recommends a series resistor for the crystal circuit. Further details are provided in
SMSC Application Note 10.7 - "Parallel Crystal Circuit Input Voltage Control" and in the LAN83C185 MII
Customer Reference Board (Assy. 6316) schematic.
6 LED’s
The LAN83C185 provides four LED outputs signals, which share pins with the PHY address signals, as
described in the PHY address section below: These signals are:
ƒ Speed LED (SPEED100)
ƒ Link LED (LINKON)
ƒ Activity LED (ACTIVITY)
ƒ Full-Duplex LED (FDUPLEX)
The LAN83C185 does not include the collision LED signal (COLST) found on the LAN83C180.
Please note: LED polarity is dependent on the PHY Address strapping. Please refer to the LAN83C185
datasheet for proper operation.
SMSC AN 10.13
Page 8
APPLICATION NOTE
Revision 1.2 (07-12-04)