EMC2300_11 Datasheet, PDF (68/82 Pages) SMSC Corporation – Fan Control Device with High Frequency PWM and Temperature Monitors

8.2.21
Fan Control Device with High Frequency PWM and Temperature Monitors
Datasheet
Register 7Eh: Interrupt Enable 1 Register
Register
Address
7Eh
Read/
Write
R/W
Table 8.40 Register 7Eh: Interrupt Enable 1 Register
Register Name
Interrupt Enable 1 (Voltages)
Bit 7
(MSb)
VCC
Bit 6
RES
Bit 5 Bit 4
RES RES
Bit 3
VCCP
Bit 2
Bit 1
Bit 0
(LSb)
RES RES VOLT
Default
Value
ECh
This register becomes read only when the Lock bit is set. Any further attempts to write to this register
shall have no effect.
This register is used to enable individual voltage error events to set the corresponding status bits in
the interrupt status registers. This register also contains the group voltage enable bit (Bit[0] VOLT),
which is used to enable voltage events to force the interrupt pin (INT#) low if interrupts are enabled
(see Bit[2] INTEN of the Special Function register at offset 7Ch).
See Figure 6.1 Interrupt Control on page 24.
This register contains the following bits:
Table 8.41 Interrupt Enable 1 Register bits
BIT
NAME R/W DEFAULT
DESCRIPTION
0
VOLT
R/W
1
Reserved R/W
2
Reserved R/W
3
VCCP
R/W
4
Reserved R/W
5
Reserved R/W
6
Reserved R/W
7
VCC
R/W
0 Group INT# Voltage Enable - when set, enables out-of-limit voltages to
drive the INT# pin low (provided that the INTEN bit in the Special Function
register is also set).
0 Reserved
1 Reserved
1 When set Enables VCCP Channel to update status registers and
generate interrupts
0 Reserved
1 Reserved
1 Reserved
1 When set, enables VCC channel to update status registers and generate
interrupts.
8.2.22 Register 7Fh: Configuration Register
Register
Address
7Fh
Read/
Write
R/W
Table 8.42 Register 7Fh: Configuration Register
Register Name
Configuration
Bit 7
(MSb)
INIT
Bit 6
SMSC
Bit 5
SMSC
Bit 4
SUREN
Bit 3
TRDY
Bit 2
RES
Bit 1
P2INT
Bit 0
(LSb)
T3INT
Default
Value
10h
These registers become read only when the Lock bit is set. Any further attempts to write to these
registers shall have no effect.
Revision 0.32 (06-23-08)
68
DATASHEET
SMSC EMC2300