LAN91C100FD_08 Datasheet, PDF (66/77 Pages) SMSC Corporation – FEAST Fast Ethernet Controller with Full Duplex Capability

FEAST Fast Ethernet Controller with Full Duplex Capability
Chapter 9 Timing Diagrams
ADDRESS
nADS
READ DATA
nRD,nWR
WRITE DATA
t2
A1-15, AEN, nBE0-nBE3 valid
t3
t4
t1
t5
t5A
D0-D31 valid
Figure 9.1 - Asynchronous Cycle - nADS=0
PARAMETER
t1 A1-A15, AEN, nBE0-nBE3 Valid and nADS Low Setup to
nRD, nWR Active
t2 A1-A15, AEN, nBE0-nBE3 Hold After nRD, nWR Inactive
(Assuming nADS Tied Low)
t3 nRD Low to Valid Data
t4 nRD High to Data Floating
t5 Data Setup to nWR Inactive
t5A Data Hold After nWR Inactive
MIN TYP MAX UNITS
25
ns
20
ns
40
ns
30
ns
30
ns
5
ns
Revision 1.0 (09-22-08)
Page 66
DATASHEET
SMSC LAN91C100FD Rev. D