LAN91C100FD_08 Datasheet, PDF (22/77 Pages) SMSC Corporation – FEAST Fast Ethernet Controller with Full Duplex Capability

FEAST Fast Ethernet Controller with Full Duplex Capability
The default bit values upon hard reset are highlighted below each register.
Table 5.1 - Internal I/O Space Mapping
BANK0
BANK1
BANK2
0
TCR
CONFIG
MMU COMMAND
2
EPH STATUS
BASE
PNR
ARR
4
RCR
IA0-1
FIFO PORTS
6
COUNTER
IA2-3
POINTER
8
MIR
IA4-5
DATA
A
MCR
GENERAL PURPOSE
DATA
C
RESERVED (0)
CONTROL
INTERRUPT
E
BANK SELECT
BANK SELECT
BANK SELECT
A special BANK (BANK7) exists to support the addition of external registers.
BANK3
MT0-1
MT2-3
MT4-5
MT6-7
MGMT
REVISION
RCV
BANK SELECT
BANK SELECT REGISTER
OFFSET
E
HIGH
0
BYTE
0
LOW
BYTE
X
NAME
BANK SELECT
REGISTER
0
1
0
1
X
X
TYPE
READ/WRITE
1
0
1
0
X
X
SYMBOL
BSR
0
1
1
0
1
1
BS2
BS1
BS0
0
0
0
BS2, BS1, BS0 Determine the bank presently in use. This register is always accessible and is used to
select the register bank in use.
The upper byte always reads as 33h and can be used to help determine the I/O location of the
LAN91C100FD.
The BANK SELECT REGISTER is always accessible regardless of the value of BS0-2.
Note:
The bank select register can be accessed as a doubleword at offset Ch, as a word at offset Eh, or as at
offset Fh, however a doubleword write to offset Ch will write the BANK SELECT REGISTER but will not
write the registers Ch and Dh.
BANK 7 has no internal registers other than the BANK SELECT REGISTER itself. On valid cycles where
BANK7 is selected (BS0=BS1=BS2=1), and A3=0, nCSOUT is activated to facilitate implementation of
external registers.
Note:
BANK7 does not exist in LAN91C9x devices. For backward S/W compatibility BANK7 accesses should be
done if the Revision Control register indicates the device is the LAN91C100FD.
Revision 1.0 (09-22-08)
Page 22
DATASHEET
SMSC LAN91C100FD Rev. D