COM20020_00 Datasheet, PDF (62/82 Pages) SMSC Corporation – Universal Local Area Network Controller with 2K x 8 On-Board RAM

AD0-AD2,
D3-D7
nCS
ALE
nDS
DIR
TIMING DIAGRAMS
VALID
t1
t2,
t4
VALID DATA
t3
t12
t11
t6
t5
t13
t8
t9
t7
t1
Not
t10
MUST BE: RBUSTMG bit = 0
Parameter
min
t1 Address Setup to ALE Low
t2 Address Hold from ALE Low
t3 nCS Setup to ALE Low
t4 nCS Hold from ALE Low
t5 ALE Low to nDS Low
t6 nDS Low to Valid Data
t7 nDS High to Data High Impedance
t8 Cycle Time (nDS Low to Next Time Low)
t9 DIR Setup to nDS Active
t10 DIR Hold from nDS Inactive
t11 ALE High Width
t12 ALE Low Width
t13 nDS Low Width
t14 nDS High Width
20
10
10
10
15
0
4TARB*
10
10
20
20
60
20
max
40
20
* _{TARB is the Arbitration Clock Period}
TARB is identical to Topr if SLOW ARB = 0
TARB is twice Topr if SLOW ARB = 1
Topr is the period of operation clock. It depends on CKUP1 and CKUP0 bits
units
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
FIGURE 11 - MULTIPLEXED BUS, 68XX-LIKE CONTROL SIGNALS; READ CYCLE
62
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