COM20020-5 Datasheet, PDF (50/58 Pages) SMSC Corporation – Universal Local Area Network Controller with 2K x 8 On-Board RAM

A0-A2
nCS
VALID
t1
t2
t4
t3
nWR
D0-D7
t5
Note 2
t6
t5**
t7
VALID DATA
Parameter
t1 Address Setup to nWR Active
t2 Address Hold from nWR Inactive
t3 nCS Setup to nWR Active
t4 nCS Hold from nWR Inactive
t5 Cycle Time (nWR Low to Next Time Low)**
t6 Valid Data Setup to nWR High
t7 Data Hold from nWR High
min
max units
15
nS
10
nS
5
nS
0
nS
4T*
nS
30**
nS
10
nS
* _{T is the Arbitration Clock Period.}
T is identical to XTAL1 if SLOW ARB = 0,
T is twice XTAL1 period if SLOW ARB = 1
**nCS may become active after control becomes active, but the data setup time will now
be 30 nS measured from the later of nCS falling or Valid Data available.
Note 1: The Microcontroller typically accesses the COM20020-5 on every other cycle.
Therefore, the cycle time specified in the microcontroller's datasheet
should be doubled when considering back-to-back COM20020-5 cycles.
Note 2: Any cycle occurring after a write to the Address Pointer Low Register
requires a minimum of 4T from the trailing edge of nWR to the leading edge
of the next nWR.
FIGURE 13 - NON-MULTIPLEXED BUS, 80XX-LIKE CONTROL SIGNALS; WRITE
CYCLE
50