COM20020-5 Datasheet, PDF (19/58 Pages) SMSC Corporation – Universal Local Area Network Controller with 2K x 8 On-Board RAM

internal RAM upon writing Address Pointer low
only once.
Tentative ID Register
The Tentative ID Register is a read/write 8-bit
register accessed when the Sub Address Bits
are set up accordingly (please refer to the
Configuration Register). The Tentative ID
Register can be used while the node is on-line to
build a network map of those nodes existing on
the network. It minimizes the need for operator
interaction with the network. The node
determines the existence of other nodes by
placing a Node ID value in the Tentative ID
Register and waiting to see if the Tentative ID bit
of the Diagnostic Status Register gets set. The
network map developed by this method is only
valid for a short period of time, since nodes may
join or depart from the network at any time.
When using the Tentative ID feature, a node
cannot detect the existence of the next logical
node to which it passes the token. The Next ID
Register will hold the ID value of that node. The
Tentative ID Register defaults to the value 0000
0000 upon hardware reset only.
Node ID Register
The Node ID Register is a read/write 8-bit
register accessed when the Sub Address Bits
are set up accordingly (please refer to the
Configuration Register). The Node ID Register
contains the unique value which identifies this
particular node. Each node on the network
must have a unique Node ID value at all times.
The Duplicate ID bit of the Diagnostic Status
Register helps the user find a unique Node ID.
Refer to the Initialization Sequence section for
further detail on the use of the DUPID bit. The
core of the COM20020-5 does not wake up until
a Node ID other than zero is written into the
Node ID Register. During this time, no
microcode is executed, no tokens are passed by
this node, and no reconfigurations are caused
by this node. Once a non-zero Node ID is
placed into the Node ID Register, the core
wakes up but will not join the network until the
TXEN bit of the Configuration Register is set.
While the Transmitter is disabled, the Receiver
portion of the device is still functional and will
provide the user with useful information about
the network. The Node ID Register defaults to
the value 0000 0000 upon hardware reset only.
Next ID Register
The Next ID Register is an 8-bit, read-only
register, accessed when the sub-address bits
are set up accordingly (please refer to the
Configuration Register). The Next ID Register
holds the value of the Node ID to which the
COM20020-5 will pass the token. When used in
conjunction with the Tentative ID Register, the
Next ID Register can provide a complete
network map. The Next ID Register is updated
each time a node enters/leaves the network or
when a network reconfiguration occurs. Each
time the microsequencer updates the Next ID
Register, a New Next ID interrupt is generated.
This bit is cleared by reading the Next ID
Register. Default value is 0000 0000 upon
hardware reset.
Status Register
The COM20020-5 Status Register is an 8-bit
read-only register. All of the bits, except for bits
5 and 6, are software compatible with previous
SMSC ARCNET devices. In previous SMSC
ARCNET devices the Extended Timeout status
was provided in bits 5 and 6 of the Status
Register. In the COM20020-5, the COM90C66,
and the COM90C165, COM20020, COM20051
and COM20051+, these bits exist in and are
controlled by the Configuration Register. The
Status Register contents are defined as in Table
3, but are defined differently during the
Command Chaining operation. Please refer
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