LPC47M112 Datasheet, PDF (195/208 Pages) SMSC Corporation – ENHANCED SUPER I/O CONTROLLER WITH LPC INTERFACE

Enhanced Super I/O Controller with LPC Interface
Datasheet
PD<7:0>
nACK
nALF
t2
t1
t5
t6
t4
t3
t4
FIGURE 24 - ECP PARALLEL PORT REVERSE TIMING
NAME
t1
t2
t3
t4
t5
t6
DESCRIPTION
PDATA Valid to nACK Asserted
nALF Asserted to PDATA Changed
nACK Asserted to nALF Deasserted
(Notes 1,2)
nACK Deasserted to nALF Asserted (Note 2)
nALF Asserted to nACK Asserted
nALF Deasserted to nACK Deasserted
MIN TYP MAX UNITS
0
ns
0
ns
80
200
ns
80
200
ns
0
ns
0
ns
Note 1: Maximum value only applies if there is room in the FIFO and terminal count has not been received. ECP can
stall by keeping nALF low.
Note 2: nACK is not considered asserted or deasserted until it is stable for a minimum of 75 to 130 ns.
SMSC DS – LPC47M112
Page 195
Rev. 02/02/2005