LPC47B34X Datasheet, PDF (151/250 Pages) SMSC Corporation – 128 Pin Enhanced Super I/O with LPC Interface for Consumer Applications

the nIO_SMI pin is not powered by VTR. In this case, the event causing the status bit to be set (low-
to-high edge) will trigger the generation of the PME and SMI.
Case 3. An intrusion occurs under VCC power. In this case, the “INTRUSION” PME and SMI status
bits will be set. If the corresponding PME enable bit is set, a PME will be generated under VCC
power. If the corresponding SMI enable bit is set, an SMI will be generated under VCC power. In this
case, the event causing the status bit to be set (low-to-high edge) will trigger the generation of the
PME and SMI.
LED BLINK AND COLOR CONTROL
The LPC47B34x can be configured to control a bi-color LED. Pin 12 defaults to the LED “COLOR”
function, and pin 13 defaults to the LED “BLINK” function. These pins are controlled through software
by programming the appropriate blink rate and color in the LED register.
See the LED register description in the runtime registers section (offset 0x5B). The blink rate is
programmed through bits[3:1] and the color is programmed through bit[0].
The logical value in bit[0] is reflected on the COLOR pin (1 = high). The BLINK pin is inverted when
bit[0] = 1. This is to maintain the duty cycle for each blink rate.
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