LPC47B34X Datasheet, PDF (15/250 Pages) SMSC Corporation – 128 Pin Enhanced Super I/O with LPC Interface for Consumer Applications

Indication of 32kHz Clock
There is a bit to indicate whether or not the 32kHz clock input is connected to the LPC47B34x. This
bit is located at bit 0 of the CLOCKI32 register at 0xF0 in Logical Device A. This register is powered
by VTR and reset on a VTR POR.
Bit[0] (CLK32_PRSN) is defined as follows:
0=32kHz clock is connected to the CLKI32 pin (default)
1=32kHz clock is not connected to the CLKI32 pin (pin is grounded).
Bit 0 controls the source of the 32kHz (nominal) clock for the WDT, ring filter, the LED blink logic, the
“wake on specific key” logic. When the external 32kHz clock is connected (CLK32_PRSN=0), that will
be the source for these functions. When the external 32kHz clock is not connected (CLK32_PRSN=1),
an internal 32kHz clock source will be derived from the 14MHz clock for these functions when VCC is
active.
The internal ring oscillator can be used for the LED blink and the wake on specific key logic, when the
32kHz clock is not available. See the Internal Ring Oscillator section.
The following functions will not work under VTR power (VCC removed) if the external 32kHz clock is
not connected. These functions will work under VCC power.
• Ring Filter
• WDT
Internal Ring Oscillator
The internal ring oscillator may be used when the 32kHz trickle input clock is not active.
oscillator can be used for the following functions when VCC=0:
• LED blink
• Wake on Specific Key Feature
This ring
When the ring oscillator is used, there is a frequency range on the LED blink rates as follows (the duty
cycle is in parenthesis).
• 0.25 Hz max, 0.084-0.25Hz (10%)
• 0.5 Hz max, 0.17-0.5 Hz (25%)
• 1.0 Hz max, 0.33-1.0 Hz (50%)
• 2.0 Hz max, 0.67-2.0 Hz (50%)
• 3.0 Hz max, 1.0 - 3.0 Hz (50%)
• 4.0 Hz max, 1.33-4.0 Hz (50%)
See the LED register (offset 0x5B) in the “Runtime Registers” section for the bit combinations to select
these blink rates.
The Oscillator Select register contains the bits that are used to determine whether the 32kHz trickle
clock is used or the ring oscillator is used, as follows:
• If bits[1:0] are set to ‘10’ then the 32kHz input is always used for the functions described above.
In this case, the internal ring oscillator is not used. This is the default condition. The
CLK32_PRSN bit is set to ‘0’.
• If bits[1:0] are set to ‘01’ then the internal ring oscillator is always used for the functions described
above while VCC=0 (S3, S4/S5 sleep states). When VCC is active, the 32kHz clock signal is
15