U630H16P Datasheet, PDF (10/17 Pages) Simtek Corporation – HardStore 2K x 8 nvSRAM

U630H16P
No. RECALL Cycle G-controlled
46 RECALL Cycle Time
47 RECALL Initiation Cycle Time
48 NE Setup
49 Write Enable Setup
50 Chip Enable Setup
RECALL Cycle: G-controlled^{o, r}
Symbol
Alt.
t_GLQXR
t_GLNH
t_NLGL
t_WHGL
t_ELGL
IEC
t_d(G)R
t_w(G)R
t_su(N)R
t_su(W)R
t_su(E)R
Min.
25
5
5
5
NE
G
W
E
DQi
Output
t_su(N)R
(48)
t_{w(G)R (47)}
t_{su(W)R (49)}
t_{su(E)R (50)}
High Impedance
t_{d(G)R (46)}
Max.
Unit
20
μs
ns
ns
ns
ns
m: Measured with W and NE both returned HIGH, and G returned LOW. Note that STORE cycles are inhibited/aborted by V_CC < V_SWITCH
(STORE inhibit).
n: Once t_w(W)S has been satisfied by NE, G, W and E, the STORE cycle is completed automatically. Any of NE, G, W and E may be used to
terminate the STORE initiation cycle.
o: If E is LOW for any period of time in which W is HIGH while G and NE are LOW, than a RECALL cycle may be initiated.
For E-controlled STORE during t_w(E)S W, G, NE have to be static.
p: Measured with W and NE both HIGH, and G and E LOW.
q: Once t_w(N)R has been satisfied by NE, G, W and E, the RECALL cycle is completed automatically. Any of NE, G or E may be used to
terminate the RECALL initiation cycle.
r: If W is LOW at any point in which both E and NE are LOW and G is HIGH, than a STORE cycle will be initiated instead of a RECALL.
STK Control #ML0037
10
Rev 1.0
March 31, 2006