SI53325 Datasheet, PDF(9/27 Page) Silicon Laboratories – DUAL 1:5 LOW JITTER LVPECL CLOCK BUFFER

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SI53325 Datasheet, PDF (9/27 Pages) Silicon Laboratories – DUAL 1:5 LOW JITTER LVPECL CLOCK BUFFER

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Si53325

2.2. Input Bias Resistors

Internal bias resistors ensure a differential output low condition in the event that the clock inputs are not connected.

The non-inverting input is biased with a 18.75 kï pull-down to GND and a 75 kï pull-up to VDD. The inverting input

is biased with a 75 kï pull-up to VDD.

VDD

RPU

RPD

RPU = 75 kï

RPD = 18.75 kï

CLK0 or

CLK1

Figure 5. Input Bias Resistors

Rev. 1.0

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