C8051T620-DK Datasheet, PDF (9/30 Pages) Silicon Laboratories – C8051T620/2 DEVELOPMENT KIT USER’S GUIDE

C8051T620/2-DK
7. Development Boards
The C8051T620/2 Development Kit includes a motherboard that interfaces to various daughter boards. The
C8051T62x Emulation Daughter Board contains a C8051F34A device to be used for preliminary software
development. The C8051T620 Socket Daughter Board and C8051T622 Socket Daughter Board allow
programming and evaluation of the actual C8051T62x devices. Numerous input/output (I/O) connections are
provided on the motherboard to facilitate prototyping. Figure 3 shows the C8051T62x Motherboard and indicates
locations for various I/O connectors. Figure 4 shows the factory default shorting block positions. Figures 5, 6, and 7
show the available C8051T62x daughter boards. Figures 8, 9, 10, and 11 show the available C8051T32x daughter
boards.
P1, P2
P3
P4
P5
J1
J2
J3
J4
J5
J6
J7
J8
J9
J10
J11
J12
J13
J14
J15
Daughter board connection
Power connector that accepts input from 7.5 to 15 V dc unregulated power adapter
USB connector for UART to USB communications interface
USB Debug interface connector
Analog I/O terminal block
Port 0 header
Port 1 header
Port 2 header
Port 3 header with access to VDD and GND
Power supply selection header (See "7.3. Power Supply Headers (J6 and J7)" on page 15)
Power supply enable header that connects power source selected on J6 to the board's main
power supply net
Communications interface control signal header
Connects port pins to the switches labeled “SW1” and “SW2”
Connects port pins to the LEDs labeled “LED1” and “LED2”
Communications interface data signal header
Connects potentiometer to the port pin, P2.5
Additional connections to ground
Connects an external VREF from J1 to P0.7
VPP supply connection used when programming EPROM devices
Rev. 0.5
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