SI51210 Datasheet, PDF (8/12 Pages) Silicon Laboratories – TWO OUTPUTS FACTORY PROGRAMMABLE CLOCK GENERATOR

Si51210
4. Pin Descriptions: 6-Pin TDFN
VDD ₁
6 ^VSS
XIN/CLKIN 2
XOUT 3
Si51210
SSCLK2/REFCLK_D
5 ^FSEL/SSEL/
SSON/PD/OE1
SSCLK1/REFCLK
4 _FSEL/SSEL/
SSON/OE2
Table 5. Si51210 6-Pin Descriptions
Pin #
1
Name
VDD
Type
PWR 2.5 to 3.3 V power supply.
Description
2
XIN/CLKIN
I External crystal and clock input.
3
XOUT
O Crystal output. Leave this pin unconnected (floating) if an external clock
input is used.
4
SSCLK1/REFCLK/
I/O Programmable SSCLK1 or REFCLK output or MultiFunction control
FSEL/SSEL/SSON/
input. The frequency at this pin is synthesized by internal PLL if pro-
OE2
grammed as SSCLK1 with or without spread. If programmed as REF-
CLK, output clock is buffered output of crystal or reference clock input. If
programmed as MultiFunction control input, it can be OE, FSEL, SSEL
and SSON.
5 SSCLK2/REFCLK_D/ I/O Programmable SSCLK2 or REFCLK_D output or MultiFunction control
OE1/FSEL/SSEL/
input. The frequency at this pin is synthesized by internal PLL if pro-
SSON/PD
grammed as SSCLK2 with or without spread. If programmed as
REFCLK_D, output clock is buffered output of crystal or reference clock
input divided by 2 to 32. If programmed as MultiFunction control input, it
can be OE, PD, FSEL, SSEL and SSON.
6
VSS
GND Ground.
8
Preliminary Rev. 0.7