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SI845X Datasheet, PDF (7/36 Pages) Silicon Laboratories – LOW POWER FIVE-CHANNEL DIGITAL ISOLATOR | |||
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Si8450/51/52/55
Table 3. Electrical Characteristics (Continued)
(VDD1 =5 V±10%, VDD2 =5 V±10%, TA = â40 to 125 °C)
Parameter
Si845xBx
Maximum Data Rate
Symbol Test Condition
Min
0
Typ
Max Unit
â
150 Mbps
Minimum Pulse Width
â
â
6.0
ns
Propagation Delay
tPHL, tPLH See Figure 2
3.0
6.0
9.5
ns
Pulse Width Distortion
PWD
See Figure 2
â
1.5
2.5
ns
|tPLH - tPHL|
Propagation Delay Skew2
Channel-Channel Skew
d All Models
tPSK(P-P)
tPSK
â
2.0
3.0
ns
â
0.5
1.8
ns
de Output Rise Time
tr
CL = 15 pF
â
3.8
5.0
ns
See Figure 2
n s Output Fall Time
tf
CL = 15 pF
â
2.8
3.7
ns
See Figure 2
e n Common Mode Transient
CMTI
VI = VDD or 0 V
â
Immunity
25
â kV/µs
m ig Enable to Data Valid3
ten1
See Figure 1
â
5.0
8.0
ns
Enable to Data Tri-State3
ten2
See Figure 1
â
7.0
9.2
ns
m s Start-up Time3,4
tSU
â
15
40
µs
o e Notes:
1. The nominal output impedance of an isolator driver channel is approximately 85 ï, ±40%, which is a combination of
c D the value of the on-chip series termination resistor and channel resistance of the output driver FET. When driving loads
where transmission line effects will be a factor, output pins should be appropriately terminated with controlled
e impedance PCB traces.
R w 2. tPSK(P-P) is the magnitude of the difference in propagation delay times measured between different units operating at
the same supply voltages, load, and ambient temperature.
t e 3. See "3. Errata and Design Migration Guidelines" on page 26 for more details.
No for N 4. Start-up time is the time period from the application of power to valid data at the output.
Rev. 1.5
7
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