SI845X Datasheet, PDF (26/36 Pages) Silicon Laboratories – LOW POWER FIVE-CHANNEL DIGITAL ISOLATOR

Si8450/51/52/55
3. Errata and Design Migration Guidelines
The following errata apply to Revision A devices only. See "6. Ordering Guide" on page 29 for more details. No
errata exist for Revision B devices.
3.1. Enable Pin Causes Outputs to Go Low (Revision A Only)
When using the enable pin (EN1, EN2) function on the 5-channel (Si8450/1/2) isolators, the corresponding output
pin states (pin = An, Bn, where n can be 1…5) are driven to a logic low (to ground) when the enable pin is disabled
(EN1 or EN2 = 0). This functionality is different from the legacy 3-channel (Si8430/1) and 4-channel (Si8440/1/2)
isolators. On those devices, the isolator outputs go into a high-impedance state (Hi-Z) when the enable pin is
disabled (EN1 = 0 or EN2 = 0).
3.1.1. Resolution
The enable pin functionality causing the outputs to go low is supported in production for Revision A of the Si845x
d _{devices. Revision B corrects the enable pin functionality (i.e., the outputs will go into the high-impedance state to}
match the legacy isolator products). Refer to the Ordering Guide sections of the data sheet(s) for more information.
e _{3.2. Power Supply Bypass Capacitors (Revision A and Revision B)}
d _{When using the Si845x isolators with power supplies > 4.5 V, sufficient VDD bypass capacitors must be present on}
n _{s both the VDD1 and VDD2 pins to ensure the VDD rise time is less than 0.5 V/µs (which is > 9 µs for a > 4.5 V}
supply). Although rise time is power supply dependent, > 1 µF capacitors are required on both power supply pins
e _{n (VDD1, VDD2) of the isolator device.}
m _ig ^{3.2.1. Resolution}
For recommendations on resolving this issue, see "2.4.1. Supply Bypass" on page 22. Additionally, refer to "6.
m ^{s Ordering Guide" on page 29 for current ordering information.}
o ^{e 3.3. Latch Up Immunity (Revision A Only)}
Latch up immunity generally exceeds ± 200 mA per pin. Exceptions: Certain pins provide < 100 mA of latch-up
c ^D _{immunity. To increase latch-up immunity on these pins, 100  of equivalent resistance must be included in series}
with all of the pins listed in Table 14. The 100  equivalent resistance can be comprised of the source driver's
e _{output resistance and a series termination resistor.}
R ^{w 3.3.1. Resolution}
t ^{e This issue has been corrected with Revision B of the device. Refer to the Ordering Guide for more information.}
o ^{N Table 14. Affected Ordering Part Numbers (Revision A Only)}
N _for ^{Affected Ordering Part Numbers*}
Device
Revision
Pin#
2
Name
A1
Pin Type
Input
SI8450SV-A-IS/IS1, SI8451SV-A-IS/IS1,
SI8452SV-A-IS/IS1
A
6
10
A5
Input or Output
EN2
Input
14
B2
Output
2
A1
Input
SI8455SV-A-IS/IS1
A
6
A5
Input
14
B2
Output
*Note: SV = Speed Grade/Isolation Rating (AA, AB, BA, BB).
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Rev. 1.5