SI845X Datasheet, PDF (14/36 Pages) Silicon Laboratories – LOW POWER FIVE-CHANNEL DIGITAL ISOLATOR

Si8450/51/52/55
Table 5. Electrical Characteristics¹ (Continued)
(V_DD1 = 2.70 V, V_DD2 = 2.70 V, T_A = –40 to 125 °C)
Parameter
Si845xBx
Maximum Data Rate
Minimum Pulse Width
Symbol Test Condition
Min
0
—
Typ
Max Unit
—
150 Mbps
—
6.0
ns
Propagation Delay
t_PHL, t_PLH
See Figure 2
3.0
6.0
9.5
ns
Pulse Width Distortion
PWD
See Figure 2
—
1.5
2.5
ns
|t_PLH - t_PHL|
Propagation Delay Skew³
Channel-Channel Skew
d _{All Models}
t_PSK(P-P)
t_PSK
—
2.0
3.0
ns
—
0.5
1.8
ns
de ^{Output Rise Time}
t_r
C_L = 15 pF
—
4.8
6.5
ns
See Figure 2
n _s Output Fall Time
t_f
C_L = 15 pF
—
3.2
4.6
ns
See Figure 2
e _{n Common Mode Transient}
Immunity
CMTI
V_I = V_DD or 0 V
—
25
— kV/µs
m _{ig Enable to Data Valid}4
Enable to Data Tri-State⁴
m ^s _{Start-up Time4,5}
t_en1
See Figure 1
—
5.0
8.0
ns
t_en2
See Figure 1
—
7.0
9.2
ns
t_SU
—
15
40
µs
o ^e _Notes:
1. Specifications in this table are also valid at VDD1 = 2.6 V and VDD2 = 2.6 V when the operating temperature range is
c ^D _{constrained to TA = 0 to 85 °C.}
2. The nominal output impedance of an isolator driver channel is approximately 85 , ±40%, which is a combination of the
e _{value of the on-chip series termination resistor and channel resistance of the output driver FET. When driving loads}
R ^{w where transmission line effects will be a factor, output pins should be appropriately terminated with controlled}
impedance PCB traces.
t e 3. tPSK(P-P) is the magnitude of the difference in propagation delay times measured between different units operating at the
same supply voltages, load, and ambient temperature.
o ^{N 4. See "3. Errata and Design Migration Guidelines" on page 26 for more details.}
N _for ^{5. Start-up time is the time period from the application of power to valid data at the output.}
14
Rev. 1.5