EFM32G840F128 Datasheet, PDF (7/71 Pages) Silicon Laboratories – ARM Cortex-M3 CPU platform

Module
DBG
MSC
DMA
RMU
EMU
CMU
WDOG
PRS
I2C0
USART0
USART1
USART2
LEUART0
LEUART1
TIMER0
TIMER1
TIMER2
RTC
LETIMER0
PCNT0
PCNT1
PCNT2
ACMP0
ACMP1
VCMP
ADC0
DAC0
AES
GPIO
LCD
...the world's most energy friendly microcontrollers
Configuration
Full configuration
Full configuration
Full configuration
Full configuration
Full configuration
Full configuration
Full configuration
Full configuration
Full configuration
Full configuration with IrDA
Full configuration
Full configuration
Full configuration
Full configuration
Full configuration with DTI
Full configuration
Full configuration
Full configuration
Full configuration
Full configuration, 8-bit count register
Full configuration, 8-bit count register
Full configuration, 8-bit count register
Full configuration
Full configuration
Full configuration
Full configuration
Full configuration
Full configuration
56 pins
Full configuration
Pin Connections
DBG_SWCLK, DBG_SWDIO,
DBG_SWO
NA
NA
NA
NA
CMU_OUT0, CMU_OUT1
NA
NA
I2C0_SDA, I2C0_SCL
US0_TX, US0_RX. US0_CLK, US0_CS
US1_TX, US1_RX, US1_CLK, US1_CS
US2_TX, US2_RX, US2_CLK, US2_CS
LEU0_TX, LEU0_RX
LEU1_TX, LEU1_RX
TIM0_CC[2:0], TIM0_CDTI[2:0]
TIM1_CC[2:0]
TIM2_CC[2:0]
NA
LET0_O[1:0]
PCNT0_S[1:0]
PCNT1_S[1:0]
PCNT2_S[1:0]
ACMP0_CH[7:4], ACMP0_O
ACMP1_CH[7:4], ACMP1_O
NA
ADC0_CH[7:0]
DAC0_OUT[1:0]
NA
Available pins are shown in
Table 4.3 (p. 54)
LCD_SEG[23:0], LCD_COM[3:0],
LCD_BCAP_P, LCD_BCAP_N,
LCD_BEXT
2.3 Memory Map
The EFM32G840 memory map is shown in Figure 2.2 (p. 8) , with RAM and Flash sizes for the
largest memory configuration.
2013-11-22 - EFM32G840FXX - d0008_Rev1.71
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