EFM32G840F128 Datasheet, PDF (52/71 Pages) Silicon Laboratories – ARM Cortex-M3 CPU platform

Alternate
Functionality
LCD_COM0
LCD_COM1
LCD_COM2
LCD_COM3
LCD_SEG0
LCD_SEG1
LCD_SEG2
LCD_SEG3
LCD_SEG4
LCD_SEG5
LCD_SEG6
LCD_SEG7
LCD_SEG8
LCD_SEG9
LCD_SEG10
LCD_SEG11
LCD_SEG12
LCD_SEG13
LCD_SEG14
LCD_SEG15
LCD_SEG16
LCD_SEG17
LCD_SEG18
LCD_SEG19
LCD_SEG20
LCD_SEG21
LCD_SEG22
LCD_SEG23
LETIM0_OUT0
LETIM0_OUT1
LEU0_RX
LEU0_TX
0
PE4
PE5
PE6
PE7
PF2
PF3
PF4
PF5
PE8
PE9
PE10
PE11
PE12
PE13
PE14
PE15
PA15
PA0
PA1
PA2
PA3
PA4
PA5
PA6
PB3
PB4
PB5
PB6
PD6
PD7
PD5
PD4
LOCATION
1
2
PB11
PB12
PB14
PB13
PF0
PF1
PE15
PE14
...the world's most energy friendly microcontrollers
3
PC4
PC5
Description
An external LCD voltage may also be applied to this pin if the booster is not
enabled.
If AVDD is used directly as the LCD supply voltage, this pin may be left un-
connected or used as a GPIO.
LCD driver common line number 0.
LCD driver common line number 1.
LCD driver common line number 2.
LCD driver common line number 3.
LCD segment line 0. Segments 0, 1, 2 and 3 are controlled by SEGEN0.
LCD segment line 1. Segments 0, 1, 2 and 3 are controlled by SEGEN0.
LCD segment line 2. Segments 0, 1, 2 and 3 are controlled by SEGEN0.
LCD segment line 3. Segments 0, 1, 2 and 3 are controlled by SEGEN0.
LCD segment line 4. Segments 4, 5, 6 and 7 are controlled by SEGEN1.
LCD segment line 5. Segments 4, 5, 6 and 7 are controlled by SEGEN1.
LCD segment line 6. Segments 4, 5, 6 and 7 are controlled by SEGEN1.
LCD segment line 7. Segments 4, 5, 6 and 7 are controlled by SEGEN1.
LCD segment line 8. Segments 8, 9, 10 and 11 are controlled by SEGEN2.
LCD segment line 9. Segments 8, 9, 10 and 11 are controlled by SEGEN2.
LCD segment line 10. Segments 8, 9, 10 and 11 are controlled by SEGEN2.
LCD segment line 11. Segments 8, 9, 10 and 11 are controlled by SEGEN2.
LCD segment line 12. Segments 12, 13, 14 and 15 are controlled by
SEGEN3.
LCD segment line 13. Segments 12, 13, 14 and 15 are controlled by
SEGEN3.
LCD segment line 14. Segments 12, 13, 14 and 15 are controlled by
SEGEN3.
LCD segment line 15. Segments 12, 13, 14 and 15 are controlled by
SEGEN3.
LCD segment line 16. Segments 16, 17, 18 and 19 are controlled by
SEGEN4.
LCD segment line 17. Segments 16, 17, 18 and 19 are controlled by
SEGEN4.
LCD segment line 18. Segments 16, 17, 18 and 19 are controlled by
SEGEN4.
LCD segment line 19. Segments 16, 17, 18 and 19 are controlled by
SEGEN4.
LCD segment line 20. Segments 20, 21, 22 and 23 are controlled by
SEGEN5.
LCD segment line 21. Segments 20, 21, 22 and 23 are controlled by
SEGEN5.
LCD segment line 22. Segments 20, 21, 22 and 23 are controlled by
SEGEN5.
LCD segment line 23. Segments 20, 21, 22 and 23 are controlled by
SEGEN5.
Low Energy Timer LETIM0, output channel 0.
Low Energy Timer LETIM0, output channel 1.
LEUART0 Receive input.
LEUART0 Transmit output. Also used as receive input in half duplex commu-
nication.
2013-11-22 - EFM32G840FXX - d0008_Rev1.71
52
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