EFM32G840F128 Datasheet, PDF (33/71 Pages) Silicon Laboratories – ARM Cortex-M3 CPU platform

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Symbol
Parameter
Condition
8 bit
Min
Typ
11
12 bit
13
t_ADCACQ
Acquisition time
Programmable
1
t_ADCACQVDD3 Required acquisi-
2
tion time for VDD/3
reference
t_ADCSTART
Startup time of ref-
erence generator
and ADC core in
NORMAL mode
Startup time of ref-
erence generator
and ADC core in
KEEPADCWARM
mode
1 MSamples/s, 12 bit, single
ended, internal 1.25V refer-
ence
1 MSamples/s, 12 bit, single
ended, internal 2.5V reference
1 MSamples/s, 12 bit, single
ended, V_DD reference
1 MSamples/s, 12 bit, differen-
tial, internal 1.25V reference
1 MSamples/s, 12 bit, differen-
tial, internal 2.5V reference
1 MSamples/s, 12 bit, differen-
tial, 5V reference
SNR_ADC
Signal to Noise Ra-
tio (SNR)
1 MSamples/s, 12 bit, differen-
tial, V_DD reference
1 MSamples/s, 12 bit, differen-
tial, 2xV_DD reference
200 kSamples/s, 12 bit, sin-
gle ended, internal 1.25V refer-
ence
200 kSamples/s, 12 bit, single
ended, internal 2.5V reference
200 kSamples/s, 12 bit, single
ended, V_DD reference
200 kSamples/s, 12 bit, differ-
ential, internal 1.25V reference
200 kSamples/s, 12 bit, differ-
ential, internal 2.5V reference
200 kSamples/s, 12 bit, differ-
ential, 5V reference
Max
Unit
ADC-
CLK
Cycles
ADC-
CLK
Cycles
256 ADC-
CLK
Cycles
µs
5
µs
1
µs
59
dB
63
dB
65
dB
60
dB
65
dB
54
dB
67
dB
69
dB
62
dB
63
dB
67
dB
63
dB
66
dB
66
dB
2013-11-22 - EFM32G840FXX - d0008_Rev1.71
33
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