D2-7XX83 Datasheet, PDF (7/32 Pages) Intersil Corporation – Powered Speaker Systems

D2-7xx83
Serial Audio Interface Port Timing (Figure 1) TA = +25°C, CVDD = PLLVDD = 1.8V ±5%, RVDD = PWMVDD = 3.3V ±10%. All
grounds at 0.0V. All voltages referenced to ground.
SYMBOL
DESCRIPTION
MIN
(Note 11)
MAX
TYP
(Note 11)
UNIT
tc_SCLK
tw_SCLK
ts_LRCLK
th_LRCLK
ts_SDI
th_SDI
t_dSDO
SCKRx Frequency - SCKR0, SCKR1
SCKRx Pulse Width (High and Low) - SCKR0, SCKR1
LRCKRx Set-Up to SCLK Rising - LRCKR0, LRCKR1
LRCKRx Hold from SCLK Rising - LRCKR0, LRCKR1
SDINx Set-Up to SCLK Rising - SDIN0, SDIN1
SDINx Hold from SCLK Rising - SDIN0, SDIN1
SDOUTx Delay from SCLK Falling
12.5
MHz
40
ns
20
ns
20
ns
20
ns
20
ns
20
ns
t_cSCLK
t_wSCLK
SCKRx
t_hLRCLK
t_wSCLK
LRCLKRx
t_sLRCLK
t_sSDI
SDINx
t_dSDO
t_hSDI
SDOUTx
FIGURE 1. SERIAL AUDIO INTERFACE PORT TIMING
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7
FN7838.3
April 28, 2016