D2-7XX83 Datasheet, PDF (25/32 Pages) Intersil Corporation – Powered Speaker Systems

D2-7xx83
The power on reset circuit senses the rise of the PLLVDD supply.
When the supply reaches the sense threshold, the power on reset
pulse is generated. If the PLLVDD supply droops below the sense
threshold, the reset pulse will occur when the supply rises above
the threshold. The power on reset signal will drive the nRSTOUT
output pin low.
The two power supply brown out detectors monitor the CVDD and
PWMVDD power rails. If the power rail droops below the
threshold, the brown out detector will activate and drive the
nRSTOUT output pin low.
The system reset generation logic is activated by a low level on
the nRESET input pin or by the power on reset sensor pulse. Upon
de-assertion of nRESET a sequential counter ensures sufficient
time and clock cycle count for the internal synchronous logic to
reset.
Multiple D2-7xx83 ICs are capable of running on a common
timebase. Multiple D2-7xx83 ICs synchronize themselves onto a
single crystal oscillator so that all ICs run at identical
frequencies.
DSP CLOCK SPEED AND MEMORY CAPACITY SUPPORT
The D2-7xx83 devices are offered in part number-specific
devices that support multiple DSP clock speeds and memory
capacity. Depending on the device part number, the D2-7xx83
operates up to clock rates of 147.456MHz or 159.744MHz, and
offers memory capacity of 24k/24k/32k or 40k/40k, 56k of
X/Y/P memory space.
The higher speed and larger memory devices support designs
requiring higher processing capacity, while the lower speed
devices provide cost optimization to systems not requiring the
additional audio processing and decode capability.
Refer to “DAE-6 Device Feature Set Offering” on page 3 for the
device part numbers and definitions of clock speed and memory
capacity.
Hardware I/O Functions
The D2-7xx83 provides programmable I/O pins used for various
hardware functions of the system design. Pin functions are
defined by the product firmware, and may be different from one
design to another.
GENERAL-PURPOSE (GPIO) I/O PINS,
Eight dedicated General Purpose I/O (GPIO) pins are available for
system use. These are controlled only by the D2-7xx83 device
family firmware.
TIMERS
A timer block consisting of 3 separate general purpose timers
provides programmed control of event or count down timing
functions. The timer functions are controlled through the
firmware, where these timers can operate as timed pulse
generators, as pulse-width modulators, or as event counters to
capture an event or to measure the width or period of a
connected signal. These timers are connected to the 3 timer pins
(TIO[0:2]), which are also assignable as I/O by firmware.
POWER SUPPLY SYNCHRONIZATION
The PSSYNC pin provides a power supply synchronization signal
for switching power supplies. Firmware configures PSSYNC to the
frequency and duty cycle needed by the system switching
regulator. The proper configuration eliminates audio output tones
generated if the switching power supply is not locked to the
amplifier switching.
POWER SUPPLY ANTI-PUMP
D2-7xx83 supports designs to correct for power supply pumping
that occurs in half-bridge output stage topologies. The PUMPHI
and PUMPLO pins provide a differential PWM signal pair that
drive an anti-pump correction stage. The dead time and duty
cycle are adjustable to eliminate the power supply DC offset.
Amplifier Protection
The D2-7xx83 supports individual PWM channel protection
through individual protection input pins. These PROTECT pins are
primarily intended for protecting the PWM powered output
stages. The protection inputs are activated by either a pulse or
level driven into the pin. Firmware configures the input
processing logic to properly interpret the input signal as rising
edge triggered, falling edge triggered, high level, or low level.
The protection input signal is generated by specialized sensing
circuits. There are several kinds of sensing circuits for detecting
current, temperature, or voltage. A powered PWM output stage or
a power supply pump driver typically uses an overcurrent sensor.
This sensor will detect power FET current, load current, or both.
These circuits are unique to the specific power stage design, and
may be embedded inside an integrated power stage.
Temperature and voltage sensing are accomplished in a variety
of ways and usually create a DC level representing a fault
condition.
D2-7xx83 designs incorporate a variety of protection strategies to
prevent damage from the high voltages, currents, and
temperatures present in class-D amplifier designs. This
protection is also effective against user-induced faults, such as
clipping, output overload, or output shorts, including both shorted
outputs or short-to-ground faults.
The D2-92xx IC works in conjunction with specific surrounding
parts to provide continuous system monitoring for destructive
events. These events include:
• Output Overcurrent
• Output Short Circuit
• Over-Temperature (Thermal Event)
• Power Supply Brown Out
• Shoot Through Overcurrent
Protection features and their details are firmware application
dependent.
Firmware functions running on the D2-7xx83 can be assigned to
observe the temperature at critical points in the hardware and
automatically respond to excessive temperature. Depending on
the specific implementation, this response can be as simple as
turning on an optional fan to reduce temperature, or managing
the audio signal to reduce power consumption.
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FN7838.3
April 28, 2016